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Micro2440核心板原理图


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Schematic Diagram
Micro2440核心板原理图

D

C

CPU1 01-CPU1.Sch

C

CPU2 02-CPU2.Sch

CPU3 03-CPU3.Sch

SDRAM 04-MEM.sch

B

B

广州友善之臂计算机科技有限公司设计出品 www.arm9.net
Designed by Guangzhou FriendlyARM

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A

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VDD33V

R22 4.7K D
OM0 nXDACK0 nLED_3 nXDREQ0 nLED_4

D J1 1 2 CON2

K2 nLED_1 L5 nLED_2 F6 LnGCS0 B2 LnGCS1 C3 LnGCS2 C4 LnGCS3 D3 LnGCS4 C2 LnGCS5 C5 LnOE E4 nWAIT E6 LnWE T15 R13

L3 K7 K6 K5

U1A nXDACK0/GPB9 nXDACK1/GPB7 nXDREQ0/GPB10 nXDREQ1/GPB8 nXBACK/GPB5 nXBREQ/GPB6 nGCS0 nGCS1/GPA12 nGCS2/GPA13 nGCS3/GPA14 nGCS4/GPA15 nGCS5/GPA16 nOE nWAIT nWE OM0 OM1

C

TOUT0/GPB0 TOUT1/GPB1 TOUT2/GPB2 TOUT3/GPB3 TCLK0/GPB4 TCLK1/EINT19/GPG11

EXYCLK CLKOUT0/GPH9 CLKOUT1/GPH10 MPLLCAP UPLLCAP OM2 OM3 XTIpll XTOpll XTIrtc XTOrtc

LADDR0 LADDR1 LADDR2 LADDR3 LADDR4 LADDR5 LADDR6 LADDR7 LADDR8 LADDR9 LADDR10 LADDR11 LADDR12 LADDR13 LADDR14 LADDR15 LADDR16 LADDR17 LADDR18 LADDR19 LADDR20 LADDR21 LADDR22 LADDR23 LADDR24 LADDR25

B

AIN0 AIN1 AIN2 AIN3 AIN4/TSYM AIN5/TSYP AIN6/TSXM AIN7/TSXP Aref

F7 E7 B7 F8 C7 D8 E8 D7 G8 B8 A8 C8 B9 H8 E9 C9 D9 G9 F9 H9 D10 C10 H10 E10 C11 G10 D11

ADDR/GPA0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 ADDR8 ADDR9 ADDR10 ADDR11 ADDR12 Address ADDR13 ADDR14 ADDR15 ADDR16 ADDR17 ADDR18 ADDR19 ADDR20 ADDR21 ADDR22 ADDR23 ADDR24 ADDR25 ADDR26

DMA

Chip Select

S3C2440 Data

ADC

Clock

Timer

DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23 DATA24 DATA25 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31

D12 C12 E11 A13 F10 F11 C13 A14 D13 B15 A17 C14 D15 C15 D14 B17 C16 E15 E14 E13 E12 E16 F15 G13 E17 G12 F14 F12 G11 G16 H13 F13

LDATA0 LDATA1 LDATA2 LDATA3 LDATA4 LDATA5 LDATA6 LDATA7 LDATA8 LDATA9 LDATA10 LDATA11 LDATA12 LDATA13 LDATA14 LDATA15 LDATA16 LDATA17 LDATA18 LDATA19 LDATA20 LDATA21 LDATA22 LDATA23 LDATA24 LDATA25 LDATA26 LDATA27 LDATA28 LDATA29 LDATA30 LDATA31

VDD33V 4 C34 104 3

U9 4 3 1 2 1 2

R2 470

nRESET

MAX811 RST
M_nRESET

SW-PB

板载复位电路
C

22p
XTIrtc

C1

X1 32.768kHz
XTOrtc

C5 15p

XTIpll

X2 12M
C6 15p
XTOpll

C2 22p

B S3C2440X

R14 U17 R15 P15 T16 T17 R16 P16 U16

H12 R9 P10 N14 P17 P13 T13 G14 G15 M14 L12
CLKOUT0 CLKOUT1 MPLLCAP UPLLCAP

VDD33V VDD33V R68 4.7K
MPLLCAP UPLLCAP

GPB0 GPB1 L3MODE L3DATA L3CLOCK EINT19

AIN0 AIN1 AIN2 AIN3 TSYM TSYP TSXM TSXP

XTIpll XTOpll XTIrtc XTOrtc

J6 J5 J7 K3 K4 U12

C40 2n7

C41 680p

A

A

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6

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GPIO_IO GPIO_IO

GPIO_IO GPIO_IO GPIO_IO GPIO_IO GPIO_IO GPIO_IO GPIO_IO GPIO_IO

D
I2SLRCK I2SSCLK CDCLK I2SSDI I2SSDO SPIMISO EINT13 SPIMOSI EINT14 SPICLK EINT15 nSS_SPI EINT11 I2CSCL I2CSDA EINT20 GPG13 GPG14 GPG15

D

DN0 DP0 DN1 DP1 P12 N11 N12 U14

P7 R7 T7 L8 U6

M10 T11 L11 U13

U8 M9

K9 K10 P9 R11 L9 L10 J10 R10

U1B SPIMISO0/GPE11 SPIMISO1/EINT13/GPG5 SPIMOSI0/GPE12 SPIMOSI1/EINT14/GPG6 SPICLK0/GPE13 SPICLK1/EINT15/GPG7 nSS0/EINT10/GPG2 nSS1/EINT11/GPG3 I2SLRCK/GPE0 I2SSCLK/GPE1 CDCLK/GPE2 I2SSDI/nSS0/GPE3 I2SSDO/I2SSDI/GPE4 EINT20/GPG12 EINT21/GPG13 EINT22/GPG14 EINT23/GPG15 IICSCL/GPE14 IICSDA/GPE15 DN0 DP0 DN1/PDN0 DP1/PDP0

LLnSRAS LLnSCAS LLSCLK0 LLnSCS0 LLSCKE

R36 22 R54 22 R55 22 R63 22 R65 22 R66 22

LnSRAS LnSCAS LSCLK0 LnSCS0 LSCKE LSCLK1

LnWBE0 LnWBE1 LnWBE2 LnWBE3 LLnSCS0 LLnSCAS LLnSRAS LLSCKE LLSCLK0 LLSCLK1 ALE CLE RnB NCON nFCE nFRE nFWE SDCLK SDCMD SDDATA0 SDDATA1 SDDATA2 SDDATA3

C

LLSCLK1

D4 B5 D5 E5 D2 E3 D6 C6 A2 B4 B3 D1 F5 G6 R12 F4 E1 F3 N8 K8 R8 M8 P8 J9

nBE0:nWBE0:DQM0 nBE1:nWBE1:DQM1 nBE2:nWBE2:DQM2 nBE3:nWBE3:DQM3 nGCS6:nSCS0 IIC nGCS7:nSCS1 nSCAS nSRAS SDRAM SCKE SCLK0 SCLK1

VDD33V N2 L6 N4 R1 N3 P2 M6 P3 R2 M5 N5 R3 P4 R4 P5 N6 M7 T4 R5 T5 P6 R6 N7 U5
VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 VD16 VD17 VD18 VD19 VD20 VD21 VD22 VD23

USS

IIS

SPI

ALE/GPA18 CLE/GPA17 FRnB NAND CTRL NCON nFCEGPA22 nFRE/GPA20 nFWE/GPA19 SDCLK/GPE5 SDCMD/GPE6 SDIO SDDATA0/GPE7 SDDATA1/GPE8 SDDATA2/GPE9 SDDATA3/GPE10

LCD DATA LCD CTRL UART LEND/GPC0 VCLK/GPC1 VLINE:HSYNC/GPC2 VFRAME:VSYNC/GPC3 VM:VDEN/GPC4 LCD_LPCOE/GPC5 LCD_LPCREV/GPC6 LCD_LPCREVB/GPC7 LCD_PWREN/EINT12/GPG4

VD0/GPC8 VD1/GPC9 VD2/GPC10 VD3/GPC11 VD4/GPC12 VD5/GPC13 VD6/GPC14 VD7/GPC15 VD8/GPD0 VD9/GPD1 TSP VD10/GPD2 VD11/GPD3 VD12/GPD4 VD13/GPD5/USBTXDN1 VD14/GPD6/USBTXDP1 VD15/GPD7/USBOEN1 VD16/GPD8/SPIMISO1 VD17/GPD9/SPIMOSI1 VD18/GPD10/LPICLK1 VD19/GPD11/USBRXDP1 VD20/GPD12/USBRXDN1 VD21/GPD13/USBRXD1 VD22/nSS1/GPD14 VD23/nSS0/GPD15

NR1 10K
NCON GPG13 GPG14 GPG15

NR2 10K

NR3 10K

NR4 10K

C

1K NR5

1K NR8

nCTS0/GPH0 nRTS0/GPH1 TXD0/GPH2 RXD0/GPH3 TXD1/GPH4 RXD1/GPH5 nRTS1/TXD2/GPH6 nCTS1/RXD2/GPH7 UCLK/GPH8

JTAG nTRST TCK TDI TDO TMS

VDD33V
nLED_1

LED1 GREEN LED2 GREEN LED3 GREEN LED4 GREEN

R40 1K R41 1K R42 1K R43 1K

B K11 L17 K13 K14 K16 K17 J11 J15 K15 H15 J13 H17 J16 J14 L1 L4 M1 L7 M4 M3 M2 P1 P11

nLED_2

S3C2440X
nLED_3

B

LEND VCLK VLINE VFRAME VM LCDVF0 LCDVF1 LCDVF2 LCD_PWR

nCTS0 nRTS0 TXD0 RXD0 TXD1 RXD1 TXD2 RXD2 WP_SD

nTRST TCK TDI TDO TMS

nLED_4

R58
nTRST TDI TMS TCK

R59

R60

R61

VDD33V

JTAG2 1 3 5 7 9 2 4 6 8 10
nRESET TDO

10K

10K

10K

10K

R57

1K

A

A

HEADER 4X2

板载JTAG接口
1 2 3 4 5 6

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TP1 CON1 1

D VDD33V
R10 15K

VDD33V
VDDRTC

D

PWREN

VDD1.25V N16 M13 F1 F16 A16 B11 A10 A6 A1

VDD1.25V U11 T8 T6 U2 U1 L2 J2

电源电路
VDD5V U1C 1 C3 100nF C9 10uF U4 LM1117-33 GND Vin Vout NC 3 4 C12 10uF VDD33V VDD33V
Power

H14 J12 N15 P14 J17 G4

R1 330
RED

nBATT_FLT PWREN VDD_RTC(3.3V) VDD_adc(3.3V) VDDalive(1.2V) VDDalive(1.2V)

VDDA_MPLL(1.2V) VDDA_UPLL(1.2V)

VDDiarm(1.2V) VDDiarm(1.2V) VDDiarm(1.2V) VDDiarm(1.2V) VDDiarm(1.2V) VDDiarm(1.2V) VDDiarm(1.2V)

VDDi(1.2V) VDDi(1.2V) VDDi(1.2V) VDDi(1.2V) VDDi(1.2V) VDDi(1.2V) VDDi(1.2V)

C

EINT0 EINT1 EINT2 EINT3 EINT4 EINT5 EINT6 EINT7 EINT8 EINT9 EINT16 EINT17 EINT18

N17 M16 L13 M15 M17 L14 L15 L16 N9 T9 T10 M11 N10 G5 G7 G2 J3 J4 H6 G3 H5 H4 H3 H7 J8 H2

EINT0/GPF0 EINT1/GPF1 EINT2/GPF2 EINT3/GPF3 EINT4/GPF4 EINT5/GPF5 EXT INT EINT6/GPF6 EINT7/GPF7 EINT8/GPG0 EINT9/GPG1 EINT16/GPG8 EINT17/GPG9/nRST1 EINT18/GPG10/nCTS1

VDDMOP(SCLK,100MHz:3.3V) VDDMOP(SCLK,100MHz:3.3V) VDDMOP(SCLK,100MHz:3.3V) VDDMOP(SCLK,100MHz:3.3V) VDDMOP(SCLK,100MHz:3.3V) VDDMOP(SCLK,100MHz:3.3V) VDDMOP(SCLK,100MHz:3.3V) VDDOP()3.3V) VDDOP()3.3V) VDDOP()3.3V) VDDOP()3.3V) VSSA_ADC VSSi VSSi VSSi VSSi VSSi VSSi VSSi VSSA_mPLL VSSA_UPLL

VDD33V B6 A9 B12 B14 B16 F17 C1 VDD33V K12 T12 T3 J1 T14 F2 A3 A4 B10 A12 C17 G17 R17 M12 C13 33nF/6.3V 2 C4 10uF/10V

2

nRESET

H16 N13

nRESET nRSTOUT/GPA21

C7 100nF

3.3V产生电路

C U3 MAX8860EUA18 IN OUT OUT 1 4 C11 10uF/10V R33 10(1%) /FAULT 7 6 /SHDN CC GND SET 5 8 C39 100nF VDD1.25V

VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP VSSMOP

VSSiarm vssiarm VSSiarm VSSiarm VSSiarm VSSiarm VSSiarm

3

CAM_PCLK CAM_VSYNC CAM_HREF CAMCLK CAMRST CAMDATA0 CAMDATA1 CAMDATA2 CAMDATA3 CAMDATA4 CAMDATA5 CAMDATA6 CAMDATA7

CAMPCLK/GPJ8 CAMVSYNC/GPJ9 CAMHREF/GPJ10 CAMCLKOUT/GPJ11 CAMRESET/GPJ12 CAMERA IF CAMDATA0/GPJ0 CAMDATA1/GPJ1 CAMDATA2/GPJ2 CAMDATA3/GPJ3 CAMDATA4/GPJ4 CAMDATA5/GPJ5 CAMDATA6/GPJ6 CAMDATA7/GPJ7

1.25V产生电路

R31 0

R32 100K(1%) B

B

S3C2440X B1 E2 D17 D16 A15 B13 A11 A7 A5 N1 U3 U9 U15 G1 H11 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 CA10 CA11 CA12 CA13 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF CA14 CA15 CA16 CA17 CA18 CA19 CA20 CA21 CA22 CA23 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF H1 K1 T1 T2 U4 U7 U10 VDD33V C14 C15 C16 C17 C18 C19 100nF 100nF 100nF 100nF 100nF 100nF VDD1.25V C20 C21 C22 C23 C24 C25 100nF 100nF 100nF 100nF 100nF 100nF A

A

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D

LADDR2 LADDR3 LADDR4 LADDR5 LADDR6 LADDR7 LADDR8 LADDR9 LADDR10 LADDR11 LADDR12 LADDR13 LADDR14 LADDR24 LADDR25 LnWBE0 LnWBE1 LSCKE LSCLK0

23 24 25 26 29 30 31 32 33 34 22 35 36 20 21 15 39 37 38 28 41 54 6 12 46 52

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 BA0 BA1 LDQM UDQM SCKE SCLK VSS0 VSS1 VSS2 VSSQ0 VSSQ1 VSSQ2 VSSQ3

U6

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 nSCS nSRAS nSCAS nWE VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3

2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53

LDATA0 LDATA1 LDATA2 LDATA3 LDATA4 LDATA5 LDATA6 LDATA7 LDATA8 LDATA9 LDATA10 LDATA11 LDATA12 LDATA13 LDATA14 LDATA15

LADDR2 LADDR3 LADDR4 LADDR5 LADDR6 LADDR7 LADDR8 LADDR9 LADDR10 LADDR11 LADDR12 LADDR13 LADDR14 LADDR24 LADDR25 LnWBE2 LnWBE3 LSCKE LSCLK1

23 24 25 26 29 30 31 32 33 34 22 35 36 20 21 15 39 37 38 28 41 54 6 12 46 52

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 BA0 BA1 LDQM UDQM SCKE SCLK VSS0 VSS1 VSS2 VSSQ0 VSSQ1 VSSQ2 VSSQ3

U7

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 nSCS nSRAS nSCAS nWE VDD0 VDD1 VDD2 VDDQ0 VDDQ1 VDDQ2 VDDQ3

2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 19 18 17 16 1 14 27 3 9 43 49

LDATA16 LDATA17 LDATA18 LDATA19 LDATA20 LDATA21 LDATA22 LDATA23 LDATA24 LDATA25 LDATA26 LDATA27 LDATA28 LDATA29 LDATA30 LDATA31 LnSCS0 LnSRAS LnSCAS LnWE VDD33V

MICRO2440C
GND LDATA15 LDATA13 LDATA11 LDATA9 LDATA7 LDATA5 LDATA3 LDATA1 LADDR24 LADDR22 LADDR20 LADDR18 LADDR16 LADDR14 LADDR12 LADDR10 LADDR8 LADDR6 LADDR4 LADDR2 nXDREQ0 nXDACK0 nRESET LnWE LnWBE1 LnGCS3 EINT9

MICRO2440A PC55VDD5V PC53LDATA14 PC51LDATA12 PC49LDATA10 PC47LDATA8 PC45LDATA6 PC43LDATA4 PC41LDATA2 PC39LDATA0 PC37LADDR23 PC35LADDR21 PC33LADDR19 PC31LADDR17 PC29LADDR15 PC27LADDR13 PC25LADDR11 PC23LADDR9 PC21LADDR7 PC19LADDR5 PC17LADDR3 PC15LADDR1 PC13LADDR0 PC11nWAIT PC9 LnOE PC7 LnGCS4 PC5 LnGCS2 PC3 LnGCS1 PC1 EINT7
VDD5V EINT19 EINT17 EINT15 EINT13 EINT8 EINT5 EINT3 EINT1 WP_SD SDCMD SDDATA3 SDDATA1 LCDVF0 DN1 DN0 AIN2 AIN0 L3MODE L3CLOCK I2SSCLK I2SSDI GPB0 TXD2 TXD1 TXD0 nCTS0 I2CSDA

D PA2 PA4 PA6 PA8 PA10 PA12 PA14 PA16 PA18 PA20 PA22 PA24 PA26 PA28 PA30 PA32 PA34 PA36 PA38 PA40 PA42 PA44 PA46 PA48 PA50 PA52 PA54 PA56
GND EINT18 EINT16 EINT14 EINT11 EINT6 EINT4 EINT2 EINT0 SDCLK SDDATA2 SDDATA0 OM0 M_nRESET DP1 DP0 VDDRTC AIN1 L3DATA I2SLRCK CDCLK I2SSDO GPB1 RXD2 RXD1 RXD0 nRTS0 I2CSCL

19 LnSCS0 18 LnSRAS 17 LnSCAS 16 LnWE VDD33V 1 14 27 3 9 43 49

C

HY57V561620FTP-H VDD33V C30 C31 C32 C33 100nF 100nF 100nF 100nF

PC56 PC54 PC52 PC50 PC48 PC46 PC44 PC42 PC40 PC38 PC36 PC34 PC32 PC30 PC28 PC26 PC24 PC22 PC20 PC18 PC16 PC14 PC12 PC10 PC8 PC6 PC4 PC2 MICRO2440

PA1 PA3 PA5 PA7 PA9 PA11 PA13 PA15 PA17 PA19 PA21 PA23 PA25 PA27 PA29 PA31 PA33 PA35 PA37 PA39 PA41 PA43 PA45 PA47 PA49 PA51 PA53 PA55 MICRO2440

C

HY57V561620FTP-H VDD33V MICRO2440B C26 C27 C28 C29 100nF 100nF 100nF 100nF
GND PB50 CAMRST PB48 CAM_HREF PB46 CAM_PCLK PB44 CAMDATA0 PB42 CAMDATA2 PB40 CAMDATA4 PB38 CAMDATA6 PB36 LEND PB34 VLINE PB32 VM PB30 VD1 PB28 VD3 PB26 VD5 PB24 VD7 PB22 VD9 PB20 VD11 PB18 VD13 PB16 VD15 PB14 VD17 PB12 VD19 PB10 VD21 PB8 VD23 PB6 TSXP PB4 TSYP PB2

VDD33V U10
LADDR1 LADDR2 LADDR3 LADDR4 LADDR5 LADDR6 LADDR7 LADDR8 LADDR9 LADDR10 LADDR11 LADDR12 LADDR13 LADDR14 LADDR15 LADDR16 LADDR17 LADDR18 LADDR19 LADDR20 LADDR21 LADDR22

U2

K9Fxx08

B

25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 10 13

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20/NC A21/NC

D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45

LDATA0 LDATA1 LDATA2 LDATA3 LDATA4 LDATA5 LDATA6 LDATA7 LDATA8 LDATA9 LDATA10 LDATA11 LDATA12 LDATA13 LDATA14 LDATA15

R6 10K
RnB nFCE CLE ALE nFWE nFRE

7 9 16 17 18 8 6 13 36

R/B CE CLE ALE WE RE SE VSS VSS

I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0 WP VCC VCC

44 43 42 41 32 31 30 29 19 12 37

LDATA7 LDATA6 LDATA5 LDATA4 LDATA3 LDATA2 LDATA1 LDATA0

VDD33V

C10 0.1uF

PB49VDD5V PB47EINT20 PB45CAM_VSYNC PB43CAMCLK PB41CAMDATA1 PB39CAMDATA3 PB37CAMDATA5 PB35CAMDATA7 PB33 VCLK PB31 VFRAME PB29 LCD_PWR PB27 VD0 PB25 VD2 PB23 VD4 PB21 VD6 PB19 VD8 PB17 VD10 PB15 VD12 PB13 VD14 PB11 VD16 PB9 VD18 PB7 VD20 PB5 VD22 PB3 TSXM PB1 TSYM MICRO2440

Micro2440V2 核心板引脚图
核心板封装见Protel99SE格式文件

B

VDD33V VDD OE WE CE 37 28 11 26 12 14
LnOE LnWE LnGCS0

对任何一排引脚的的5V和GND上电均可对核心板进行jtag烧录编程
VDD33V
R3 10K R4 10K

VDD33V A

15 47 27 46

NC NC VSS VSS /RST/NC /WP

nRESET

A

AM29LV160DB/SST39VF1601

1

2

3

4

5

6


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