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DELL D400_图文

Mar.7 '03
ICS 950810CG Cypress CY28346-2
P.3

CPU
Banias
P.4,5 Ver.B1 QVJ3/5/6

Pebble Qual Build
DVO B
CH7009B
P.10

91.42Y01.001
02203-SE
Vcc_core: 0.7~1.708V @32A Vccp:1.05V @3A Vcc_GMCH:1.2V @1.65A Vcc_mem:2.5V @1.2A + 2*SO-DIMM

CLK GEN

HOST BUS

S-video,DVI,CRT

DDR 266/200 SO-DIMM*2
BlueTooth
Module conn. USB 1.1 P.31
P.12,13,14

MEM BUS

GMCH
Montara-GM
P.7,8,9 Ver.A2 QE27

CRT
LVDS
P.11

LCD CONN

P.11

HUB I/F

I/F IC
NCN6000
P.21

Smart Card
P.21

USB 2.0
P.22 USB*4

ICH4-M
P.15,16,17 Ver.B1 QD68

Primary IDE P.19
PCI BUS

POWER USB

PCI7510
Pass 2

CardBus
Socket
SLOT*1 P.21

PWR SW
TPS2211A
P.21

P.22 AC97

MiniPCI
P.23

P.20

1394 conn.
P.21

LPC BUS

MDC Xformer
S/W MODEM P.19
INT SPK RJ11

Gigabit LAN
A1

1.05V/1.2V
MAX1715

P.30

BIOS Serial Port
P.31

X-BUS

SIO&KBC
LPC47N254
P.28,29

SMsC

IrDA
P.31

mono
P.25

Broadcom BCM5705M P.18

LAN Switch PI31301DA
Ver.B P.18

RJ45
P.18

VCC_IO:1.05V @3A Vcc_GMCH:1.2V @1.65A

P.38

P.18

CPU CORE POWER
SC1476
Ver.A2 Vcc_core: 0.7~1.708V @32A P.36

OP AMP
P.31

CODEC
STAC9750

OP

TouchPad
P.31

TPA0312 P.25

CC1

P.24

QSW
INT MIC
P.26 P.25

DDR 2.5V/1.25V
SC1486
VCC_mem:2.5V @1.2A+2*SO-DIMM P.37

KB CONN

Headphone jack
P.25

K/B

Mic jack P.25

3V/5V/12V
MAX1632
P.35

CHARGER
MAX1645B
INPUT +DC_IN OUTPUT BATT+ +RTC_PWR P.39

USB 2.0 PS2 SMBus

LPC BUS

SPDIF

MODEM PCI BUS S-video CRT DVI
P.27

RJ45

D- Dock

1.5V/1.8V
500mA P.38

MAX1644/MAX1792

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

DELL-Wistron confidential

Title

BLOCK DIAGRAM
Size Document Number Custom

PEBBLE--02203
Sheet 1 of

Rev SE 40

Date: Thursday, March 13, 2003

01.BLOCK DIAGRAM 02.TABLE OF CONTENT 03.CLOCK GENERATOR 04.CPU 05.CPU CONFIGURATION 06.MAX6654 & ITP & FAN 07.GMCH (1/3) 08.GMCH (2/3) 09.GMCH (3/3) 10.S-VIDEO/DVI 11.LCD / INVERTER & CRT CONN 12.DDR SOCKET 13.DDR SERIAL/TERMINATOR RESISTOR 14.DDR DECOUPLING CAP 15.ICH-4M 16.ICH-4M 17.ICH-4M (1/3) (2/3) (3/3) D-DOCK AD24 DEVICE PCMCIA PCI7510 LAN Broadcom BCM5705M MINIPCI SLOT IDSEL AD17 AD16 AD19

PCI TABLE
IRQ PIRQD# PIRQC# PIRQC# PIRQB# PIRQD# PIRQB# REQ# / GNT# REQB# / GNTB# DREQ/DGNT REQ#1 / GNT#1 REQ4# / GNT4# REQ3# / GNT3# REQ0# / GNT0#

+DC_IN DOCK_DC_IN PWR_SRC DOCK_PWR_SRC VCC_IO VCC_CORE +1.5VRUN +1.8VRUN +1.2VRUN

+DC_IN 27,37,39 DOCK_DC_IN 27 PWR_SRC 11,22,27,33,35,36,37,38,39 DOCK_PWR_SRC 27 VCC_IO 4,5,6,7,9,16,17,33,38 VCC_CORE 5,33,36 +1.5VRUN 4,7,8,9,10,11,15,17,33 +1.8VRUN 4,33,38 +1.2VRUN 7,9,38

+3VRUN +3VSUS

+3VRUN 3,4,6,8,9,10,11,12,15,16,17,18,19,23,24,26,28,29,31,32,33,34,36,38,40 +3VSUS 6,11,15,16,17,18,19,20,21,23,25,27,31,33,34,37,38,40 +3VALW 16,25,27,28,29,30,34,40 +3.3VRTC 16,28,34,37 +5VRUN 6,8,10,11,17,19,23,26,29,31,32,33,34,36,37,40

Montania to Montania+ changes
1.Changed VR resistor to generate 1.35V for MGM+ core(R529,R530) 2.Changed R112 from 27.4 to 37.4 Ohm (changes HLZCOMP for MGM+) 3.Put R612,R613,R614 1K ohm 4.Need Changed PSWING,HLVREF for MGM+ if use MGM core (For Pebble don't need change because we use +1.5VRUN) 5.Layour meet DDR333 require (For Pebble already done)

+3VALW +3.3VRTC +5VRUN

18.GIGABIT LAN 19.HDD & MDC CONN. 20.CARDBUS CONTROLLER 21.CARDBUS & 1394 CONNECTOR & POWER SWITCH 22.USB POWER SWITCH & CONN 23.MINIPCI CONN 24.AUDIO CODEC 25.AUDIO AMP & JACK 26.D DOCK BUFFERS 27.D DOCK 28.SIO (1/2) 29.SIO (2/2) 30.BIOS 31.TOUCHPAD, KB ,BLUETOOTH CONN, IR 32.LED & BUTTON CONN 33.POWER PLANE ENABLES 34.POWER-ON RESET LOGIC 35.DCDC 3V/5V 36.CPU VCORE-IMVP4 SC1476 37.DDR 2.5V/1.25V & RTC & BIRIDGE BATTERY 38.VCC_IO,1.2V, 1.5V, 1.8V 39.CHARGER 40.HOLES & GND PADS

+5VSUS +5VALW +5V_QDOCK +3VAUX_LAN +1.2VAUX_LAN +2.5VAUX_LAN BATT+ +5VHDD

+5VSUS 6,11,17,21,22,24,25,31,32,33,34,35,37,38,40 +5VALW 11,27,28,32,33,34,39 +5V_QDOCK 26 +3VAUX_LAN 18,23,33 +1.2VAUX_LAN 18 +2.5VAUX_LAN 18,27 BATT+ 39 +5VHDD 19,33

LCDVDD

LCDVDD 11

AC97_5V AC97_3V CRT_VCC CBS_VCC CBS_VPP CBS_VCCF +1.25VRUN +2.5VSUS ICH_VBIAS VCC_RTC +RTCSRC +RTC_PWR

AC97_5V 19 AC97_3V 19 CRT_VCC 11 CBS_VCC 20,21 CBS_VPP 21 CBS_VCCF 21 +1.25VRUN 13,14,33,37 +2.5VSUS 6,7,9,12,14,33,37 ICH_VBIAS 16 VCC_RTC 16 +RTCSRC 37 +RTC_PWR 34,35,37,39,40

CG_* CC_* M_* G_* P_* HL_*

: CPU GTL+ : CPU CMOS : MEMORY BUS : AGP BUS : PCI BUS : HUB LINK I/F

LPC_* : LPC I/F ICH_AC_* : AC'97 LINK I/F IDE_* : IDE BUS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Table of Content
Size A3 Document Number

PEBBLE--02203
Sheet 2 of

Rev SD 40

Date: Monday, February 24, 2003

+3VRUN +3VRUN

Host Freq. Setting FS1/0 = 00 FS1/0 = 01 FS1/0 = 10 FS1/0 = 11 66MHz 100MHz 200MHz 133MHz
2

L21 *S.C.

Filtering CKT for 48MHz power plane
1 1 BC189 SC10U10V-U1 CLKGEN_48MPWR BC485 SCD01U50V3KX

1

L18

1

1

1

1

2

2

2

2

2

MLB201209-1 BC190 SCD1U16V3KX

S.C.

S.C.

S.C.

2

BC150 SC10U10V-U1

BC185 SCD1U16V3KX

BC153 BC184 BC151 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U16V3KX

BC187 BC475 BC155 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U16V3KX

1

2 MLB-201209-19

S.B.

CLKGEN_+3VRUN

PLACE NEAR EACH PIN

S.C.

S.C.

S.C.

BC188 SCD1U16V3KX CLKGEN_APWR 1 BC484 BC186 SCD1U10V2MX-1 SCD01U50V3KX 1 L20 1 2 MLB201209-1 *S.C.

+3VRUN

FS2 = 0 unbuffer mode (disable 66MHz-IN) FS2 = 1 buffer mode Mult0 = 0 Rr=221,Iref=5mA =>Vswing=1.0V@50ohm Mult0 = 1 Rr=475,Iref=2.32mA =>Vswing=0.7V@50ohm No stuff: caps are internal to CK-TITAN.
BC152 SC10P 1 U34 1 8 14 19 32 37 46 50 2 3 SC10P 1 R218 1KR3 2 SEL2 40 55 54 R543 DUMMY-R3 2 +3VRUN R522 1KR3 1 2 10KR3 R291 2 1 1 16 PM_SLP_S1# 16 PM_STPPCI# 16,36 PM_STPCPU# 25 34 53 28 43 29 30 33 35 42 41 4 9 15 20 31 36 47 VDDREF VDDPCI VDDPCI VDD3V66 VDD3V66 VDD48 VDDCPU VDDCPU X1 X2 FS2 FS1 FS0 PD# PCI_STOP# CPU_STOP# VTT_PWRGD# MULTSEL0 SDATA SCLK 3V66_0 3V66_1/VCH_CLK IREF GND GND GND GND GND GND GND GND VDDA GND CPUCLKT2 CPUCLKC2 CPUCLKT1 CPUCLKC1 CPUCLKT0 CPUCLKC0 26 27 45 44 49 48 52 51 24 23 22 21 7 6 5 18 17 16 13 12 11 10 39 38 56

2

2

BC183 SC10U10V-U1

S.C.

RN7 1 2 RN5 1 2 RN6 1 2 TP108 TP110 R267 1 R266 1 R209 1 TP107 TP105

CPU & MEMORY Freq. Selection
+3VRUN +3VRUN 1 1

SRN33-2-U2 4 3 SRN33-2-U2 4 3

R545 1 R546 1 R214 1 R216 1

S.C. S.C.

2 49D9R3F 2 49D9R3F 2 49D9R3F 2 49D9R3F 2 2 2 2 0R3-U 0R3-U 0R3-U 0R3-U

CLK_CPU 4 CLK_CPU# 4 CLK_MCH 7 CLK_MCH# 7 CLK_ITP_CPU 4 CLK_ITP 6 CLK_ITP# 6 CLK_ITP_CPU# 4 2 49D9R3F 2 49D9R3F

2 X3 X-14D318MHZ-1-U

R544 10KR3 2 2

R520 1KR3 2

R519 DUMMY-R3

BC154

SRN33-2-U2 R523 1 4 CLK_ITP_R R215 1 3 CLK_ITP#_R R217 1 R524 1 2 22R3 2 22R3 2 33R3

1

CK-408_MULT0 1

CK-408

3V66_5 3V66_4 3V66_3 3V66_2

S.D. S.D.

CLK66_GMCH 8 CLK66_ICH 15 CLKPCIF_ICH

NS

CLK_ITP_R R220 1 CLK_ITP#_R R221 1

S.C.

PCICLK_F2 PCICLK_F1 PCICLK_F0 PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0 48MHZ_USB 48MHZ_DOT REF

16

R521 DUMMY-R3 2

VTT_PWRGD# CK-408_MULT0 CK-408_SDA CK-408_SCL 2 33R3 2 33R3 1 R273 2 475R3F

R265 1 R269 1 TP109 R264 1 R268 1 R210 1 TP106 R272 1 R271 1 R212 1 R211 1

2 33R3

PCLK_SIO 29 PCLK_PCM 20

3

7,34 CK408_IMVP_PWRGD

1 G 2

D 8 DREFSSCLK 20 CLK_48M_SCR Q31 S 2N7002

S.C. S.C.

R270 1 R626 1

*S.C.

2 22R3

2 33R3

PCLK_DOCK 27 PCLK_MINI 23 PCLK_LAN 18

*S.C. *S.C.
S.C.

2 22R3 2 22R3

+3VRUN

+3VRUN

2 33R3 2 33R3 2 33R3 2 33R3

CLK48_ICH 15 CLK48_DREF 8 CLK14_ICH 16 CLK14_SIO 29

1

R292 10KR3 2

3 4

RN18 SRN10KJ 2 1

S.B.

ICS950810CG

1 Q33 12,16,18,23 SMBC_ICH 3 2 2N7002 S Q32 3 G

CK-408_SCL 1 2 2N7002 S G

D

12,16,18,23 SMBD_ICH

CK-408_SDA

D

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Clock GEN.
Size A3 Document Number

PEBBLE--02203
Sheet 3 of

Rev SD 40

Date: Thursday, March 13, 2003

CPU_VCCA 1 R450 0R3-U R451 1 BC7 SCD01U50V3KX BC408 SCD01U50V3KX BC410 SCD01U50V3KX 2

+1.8VRUN

7 GTL_D#[15..0] GTL_D#15 GTL_D#14 GTL_D#13 GTL_D#12 GTL_D#11 GTL_D#10 GTL_D#9 GTL_D#8 GTL_D#7 GTL_D#6 GTL_D#5 GTL_D#4 GTL_D#3 GTL_D#2 GTL_D#1 GTL_D#0 C25 E23 B23 C26 E24 D24 B24 C20 B20 A21 B26 A24 B21 A22 A25 A19 D25 C23 C22 GTL_D#31 GTL_D#30 GTL_D#29 GTL_D#28 GTL_D#27 GTL_D#26 GTL_D#25 GTL_D#24 GTL_D#23 GTL_D#22 GTL_D#21 GTL_D#20 GTL_D#19 GTL_D#18 GTL_D#17 GTL_D#16 K25 N25 H26 M25 N24 L26 J25 M23 J23 G24 F25 H24 M26 L23 G25 H23 J26 K24 L24

U7C D15# D14# D13# D12# D11# D10# D9# D8# D7# D6# D5# D4# D3# D2# D1# D0# DINV0# DSTBN0# DSTBP0# D31# D30# D29# D28# D27# D26# D25# D24# D23# D22# D21# D20# D19# D18# D17# D16# DINV1# DSTBN1# DSTBP1# BANIAS-1D6G-1U U7B GTL_A#16 GTL_A#15 GTL_A#14 GTL_A#13 GTL_A#12 GTL_A#11 GTL_A#10 GTL_A#9 GTL_A#8 GTL_A#7 GTL_A#6 GTL_A#5 GTL_A#4 GTL_A#3 AA2 Y3 AA3 U1 Y1 Y4 W2 T4 W1 V2 R3 V3 U4 P4 U3 A16# A15# A14# A13# A12# A11# A10# A9# A8# A7# A6# A5# A4# A3# ADSTB0# D47# D46# D45# D44# D43# D42# D41# D40# D39# D38# D37# D36# D35# D34# D33# D32# DINV2# DSTBN2# DSTBP2# D63# D62# D61# D60# D59# D58# D57# D56# D55# D54# D53# D52# D51# D50# D49# D48# DINV3# DSTBN3# DSTBP3# Y25 GTL_D#47 AA26 GTL_D#46 Y23 GTL_D#45 V26 GTL_D#44 U25 GTL_D#43 V24 GTL_D#42 U26 GTL_D#41 AA23 GTL_D#40 R23 GTL_D#39 R26 GTL_D#38 R24 GTL_D#37 V23 GTL_D#36 U23 GTL_D#35 T25 GTL_D#34 AA24 GTL_D#33 Y26 GTL_D#32 T24 W25 W24 AF26 AF22 AF25 AD21 AE21 AF20 AD24 AF23 AE22 AD23 AC25 AC22 AC20 AB24 AC23 AB25 AD20 AE24 AE25 GTL_D#63 GTL_D#62 GTL_D#61 GTL_D#60 GTL_D#59 GTL_D#58 GTL_D#57 GTL_D#56 GTL_D#55 GTL_D#54 GTL_D#53 GTL_D#52 GTL_D#51 GTL_D#50 GTL_D#49 GTL_D#48

GTL_D#[47..32] 7

For CPU VCCA[0:3] PLL place one 0.01u & 10u for each VCCA pin
1 1 1 1 BC407 SC10U10V-U1 BC409 SC10U10V-U1 BC6 SC10U10V-U1 BC4 SC10U10V-U1 BC5 SCD01U50V3KX

+1.5VRUN 2

DUMMY-R3

2

2

2

S.C.

S.C.

S.C.

2

S.C.

U7D 3 CLK_CPU 3 CLK_CPU# 3 CLK_ITP_CPU 3 CLK_ITP_CPU# 16 CC_A20M# 16 CC_FERR# 16 CC_IGNNE# B15 B14 A16 A15 C2 CC_FERR# D3 A3 BCLK0 BCLK1 ITP_CLK0 ITP_CLK1 A20M# FERR# IGNNE# BPM3# BPM2# BPM1# BPM0# COMP3 COMP2 COMP1 COMP0 DPSLP# GTLREF3 GTLREF2 GTLREF1 GTLREF0 PROCHOT# PWRGOOD

Layout note: COMP0 and COMP2 need to be Zo=27.4ohm traces. COMP1 and COMP3 should be routed asx Zo=55ohm, traces shorter than 0.5".
C9 A9 B8 C8 AB1 AB2 P26 P25 B7 AC1 G1 E26 AD26 B17 E4 TP66 TP65 TP59 H_BPM3_ITP# H_BPM2_ITP# H_BPM1_ITP# H_BPM0_ITP# R120 R121 R14 R13 1 1 1 1 2 2 2 2 54D9R3F 27D4R3F 54D9R3F 27D4R3F H_BPM3_ITP# H_BPM2_ITP# H_BPM1_ITP# H_BPM0_ITP# 6 6 6 6 VCC_IO 1

7 GTL_DINV#0 7 GTL_DSTBN#0 7 GTL_DSTBP#0 7 GTL_D#[31..16]

GTL_DINV#2 7 GTL_DSTBN#2 7 GTL_DSTBP#2 7 GTL_D#[63..48] 7

16 CC_INTR 16 CC_NMI 16 CC_SMI# 16 CC_STPCLK# CPU_VCCA

D1 D4 B4 C6 AC26 N1 B1 F26 TP62 TP61 TP60 TP63 B2 AF7 C14 C3 C16 E1 A6 A13 C12 A12 AE7 AF6 H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0 H4 G4 G3 F3 F2 E2

CC_DPSLP# 7,16

LINT0 LINT1 SMI# STPCLK# VCCA3 VCCA2 VCCA1 VCCA0 RSVD RSVD RSVD RSVD RSVD RSVD SLP# TCK TDI TDO VCCSENSE VSSSENSE VID5 VID4 VID3 VID2 VID1 VID0 BANIAS-1D6G-1U

R16 1KR3F 2

TP8~10 as short as possible
H_GTLREF_0 1

CC_PROCHOT# CC_CPUPWRGD

Voltage divider placed within 0.5" of CPU pin via a Zo=55ohm trace.
R15 2KR3F 7 GTL_DINV#1 7 GTL_DSTBN#1 7 GTL_DSTBP#1

CC_CPUPWRGD

16 2

GTL_DINV#3 7 GTL_DSTBN#3 7 GTL_DSTBP#3 7

VCC_IO 1

R117 1KR3 1

NS
2

TP64

TEST3

A1 stepping:No stuff A0 stepping:stuff R62,R12
S.B. NS

7 GTL_A#[16..3]

R61 150R3 2 H_TDI

16 CC_CPUSLP# 6 H_TCK 6 H_TDI 6 H_TDO

H_TCK H_TDI H_TDO

TP8 TP9 36 H_VID[5:0]

TEST1 TEST2 THERMDA THERMDC THERMTRIP# TMS TRST#

C5 F23 B18 A18 C17 C11 B13

TEST1 TEST2

R62 1KR3 2 1 1 2 R12 1KR3

H_TMS 1

H_TMS 6 H_TRST# 6 R35 680R3
place within 2" to CPU

THERMDP 6 THERMDN 6 PM_THERMTRIP# 16

R64 54D9R3F 2

NS

2

R63 54D9R3F

ADS# BNR# BPRI# BR0# DBR# DBSY# DEFER# DRDY# HIT# HITM# IERR# INIT# LOCK# PRDY# PREQ# RESET# TRDY# RS2# RS1# RS0#

2

N2 L1 J3 N4 A7 M2 L4 H2 K3 K4 A4 B5 J2 A10 B10 B11 M3 L2 K1 H1 C19

GTL_IERR#

GTL_ADS# 7 GTL_BNR# 7 GTL_BPRI# 7 GTL_BR0# 7 ITP_DBRESET# 6,34 GTL_DBSY# 7 GTL_DEFER# 7 GTL_DRDY# 7 GTL_HIT# 7 GTL_HITM# 7 CC_INIT# 16 GTL_LOCK# 7 H_BPM4_PRDY# 6 H_BPM5_PREQ# 6 GTL_CPURST# 6,7 GTL_TRDY# 7 GTL_RS#2 7 GTL_RS#1 7 GTL_RS#0 7 GTL_DPWR# 7

1

1

7 GTL_ADSTB#0

Place these two resistors near pin AE7,AF6

7 GTL_A#[31..17] +3VRUN R85 VCC_IO GTL_IERR# R60 1KR3 R59 470R3 2 2 1 1 2 56R3 2 330R3 GTL_A#31 GTL_A#30 GTL_A#29 GTL_A#28 GTL_A#27 GTL_A#26 GTL_A#25 GTL_A#24 GTL_A#23 GTL_A#22 GTL_A#21 GTL_A#20 GTL_A#19 GTL_A#18 GTL_A#17 7 GTL_ADSTB#1 AF1 AE1 AF3 AD6 AE2 AD5 AC6 AB4 AD2 AE4 AD3 AC3 AC7 AC4 AF4 AE5 A31# A30# A29# A28# A27# A26# A25# A24# A23# A22# A21# A20# A19# A18# A17# ADSTB1#

DPWR#

1

1

3

R32 56R3 2

1

VCC_IO

CC_CPUPWRGD R86

GTL_REQ#[0..4] 7 REQ4# REQ3# REQ2# REQ1# REQ0# T1 P1 T2 P3 R2 GTL_REQ#4 GTL_REQ#3 GTL_REQ#2 GTL_REQ#1 GTL_REQ#0

PROCHOT# 28 1 G Q4 MMBT3904-1-U 2 2 D S Q5 2N7002

CC_PROCHOT#

1

R34 330R3

2

1

3

BANIAS-1D6G-1U

1 R33

2 0R3-U

PM_THERMTRIP#

NS
Title Size A3 Document Number

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Banias CPU (1 of 2) PEBBLE--02203
Sheet 4 of Rev SD 40 Date: Thursday, March 13, 2003

U7A

VCC_IO BANIAS-1D6G-1U 2 C125 SC10U6D3V5MX C14 SC10U6D3V5MX BC49 SC10U6D3V5MX C24 D2 D5 D7 D9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS C21 C18 C15 C13 C10 1 2 1 2 1 2 1 TC3 ST150U6D3V-1-U

VCC_IO

VCC_CORE

VCC_CORE

VCC_CORE

150uF_6.3V *1
2 C126 SC10U6D3V5MX 2 C135 SC10U6D3V5MX 2 C136 SC10U6D3V5MX C17 SC10U6D3V5MX BC355 SC10U6D3V5MX 1 2 1 2 1 C16 SC10U6D3V5MX BC354 SC10U6D3V5MX E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 1 2 1 2 1 C15 SC10U6D3V5MX BC50 SC10U6D3V5MX 1 2 1 2 1 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

0.1uF_16V *10 ,0603,X7R

10uF_6.3V *35 ,0805,X5R

BC46 BC47 BC48 BC351 BC350 BC352 BC369 SCD1U16V3KX SCD1U16V3KX SCD1U16V3KX SCD1U16V3KX SCD1U16V3KX SCD1U16V3KX SCD1U16V3KX 2 C137 SC10U6D3V5MX C18 SC10U6D3V5MX BC356 SC10U6D3V5MX 1 2 1 2 1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 2 C138 SC10U6D3V5MX C29 SC10U6D3V5MX 1 2 1 2 BC357 SC10U6D3V5MX 1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS C7 C4 C1 B25 B22 B19 B16 B12 B9 B6 B3 A26 A23 A20 A17 A14 A11 A8 A5 A2 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24 BC370 SCD1U16V3KX 2 C171 SC10U6D3V5MX 1 2 C30 SC10U6D3V5MX BC372 SCD1U16V3KX 2 C173 SC10U6D3V5MX 1 BC342 SCD1U16V3KX 2 C174 SC10U6D3V5MX 1 2 C175 SC10U6D3V5MX 1 2 C176 SC10U6D3V5MX 1 2 C117 SC10U6D3V5MX 2 C120 SC10U6D3V5MX 2 C121 SC10U6D3V5MX 2 C122 SC10U6D3V5MX 2 C123 SC10U6D3V5MX 1 2 BC358 SC10U6D3V5MX 1 1 2 BC359 SC10U6D3V5MX 1 1 2 BC371 SC10U6D3V5MX 1 F24 G6 G2 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 1 2 BC373 SC10U6D3V5MX 1 1 2 BC374 SC10U6D3V5MX 1 1 2 BC375 SC10U6D3V5MX 1

Place near CPU B9.00016.001 B9.00020.001 B9.00019.001 B9.00018.001 B9.00017.001
Title Document Number Size A3

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

D6 D8 D18 D20 D22 E5 E7 E9 E17 E19 E21 F6 F8 F18 F20 F22 G5 G21 H6 H22 J5 J21 K22 U5 V6 V22 W5 W21 Y6 Y22 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC9 AC11 AC13 AC15 AC17 AC19 AD8 AD10 AD12 AD14 AD16 AD18 AE9 AE11 AE13 AE15 AE17 AE19 AF8 AF10 AF12 AF14 AF16 AF18

VCC_CORE

Banias CPU part number

IC CPU BANIAS1.7G UFCBGA

IC CPU BANIAS1.3G UFCBGA

IC CPU BANIAS1.4G UFCBGA

IC CPU BANIAS1.5G UFCBGA

IC CPU BANIAS1.6G UFCBGA

Date: Thursday, March 13, 2003 Sheet 5 of 40

Banias CPU (2 of 2) PEBBLE--02203
Rev SD

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L5 L21 M6 M22 N5 N21 P6 P22 R5 R21 T6 T22 U21

VCC_IO

P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

Ref 10598 EMTS P69 need place Decoupling near between VCCQ ???

Wistron Corporation

VCCQ0 VCCQ1

P23 W4

+12V BC477

+5VSUS

THERMAL SENSOR MAX6656
+3VRUN R502 28 FAN1_PWM BC368 SCD1U16V3KX U51 1 4 5 13 15 2 3 BC23 SC2200P50V2KX 16 VCC ADD0 ADD1 SMBDATA SMBCLK DXP1 DXN1 STBY# MAX6656MEE ALERT# OVERT# VIN1 VIN2 VIN3 DXN2 DXP2 GND 12 14 10 11 9 7 6 8 R388 1 1 R387 2 0R3-U 2 DUMMY-R3 +12V +5VRUN +2.5VSUS ATF_INT# 28PU PU EXTTS 8 1 120KR3 2

CPU FAN

SCD1U16V3KX U73A LM358M 1 3G S

D

8

1 2 5 6 Q70 SI3456DV-U 4

3 2 BC461 SCD33U16V

+ 4 BC476 1 2

on p.28 R65.2 on p.8 R415

S.D.

SC2200P50V2KX

CN10 5 2 2 D17 FAN_VCC BC124 SCD1U16V3KX 1 2 3 4 BC125 SC10U10V-U1 SCON3 21.D0010.103 +5VSUS 1

22,28,30 DAT_SMB 22,28,30 CLK_SMB 4 THERMDP 1

Don't has +2.5VRUN!

S.B.
1

1 R526 120KR3

R525 75KR3

THERMDN_DDR 1 3 C101 SC2200P50V2KX 2 1

*SD
1

S1N4148-U 1 2

2

2

4 THERMDN

S.B.

S.B.

Layout note: Routing THERMDP and THERMDN at same layer.

THERMDP_DDR

Q30 MMBT3906-U

SMBUS Adress now is 30H

S.C.

+3VSUS 2 +2.5VSUS R505 10KR3 1 Q67 MMBT3904-1-U 1 1

2

Place under DDR

S.C.

R481 390KR3 1 R482 100KR3 2 R503 12K7R3 BC433 SCD1U16V3KX 2 BC462 2

S.B
2

R504 10KR3

28 FAN1_TACH

3

1

ITP Debug Conn.
*SD
R459 54D9R3F 4 H_TDI 4 H_TMS 4 H_TRST# 4 H_TCK 4 H_TDO 3 CLK_ITP# 3 CLK_ITP 4 H_TCK 4,7 GTL_CPURST# 1 GTL_CPURST# 4 H_BPM5_PREQ# 4 H_BPM4_PRDY# R463 27D4R3F 2 +3VRUN 1 R487 1 R512 1 R489 1 R488 1 2 0R3-U 2 0R3-U 2 0R3-U 2 0R3-U

VCC_IO

VCC_IO

2

SCD33U16V

R464 54D9R3F 2 2 2

R511 39D2R3F 2

R601 150R3 TDI_FLEX

CPU
CN9 29 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 30

ITP Conn.

1

1

1

1

S.B.

TMS_FLEX TRST_FLEX R462 1 2 22D6R3F R461 1 2 22D6R3F TCK_FLEX TDO_FLEX CLK_ITP# CLK_ITP H_TCK RESET_FLEX#

TCK(PIN 5)

TCK(PIN A13)

FBO(PIN 11)

4 H_BPM3_ITP# 4 H_BPM2_ITP# 4 H_BPM1_ITP# 4 H_BPM0_ITP#

Should place near conn.

R460 150R3 2 4,34 ITP_DBRESET#

VCC_IO

C32 SCD1U16V3KX

* S.C. NS
MLX-CON28-U ZZ.K0113.028 Title

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

MAX6656,Fan Control
Size A3 Document Number

PEBBLE--02203
Sheet 6 of

Rev SD 40

Date: Thursday, March 13, 2003

GMCH
CPURST# (GTL_CPURST#)

CPU
U14C 4 GTL_A#[31:3] GTL_A#3 P23 GTL_A#4 T25 GTL_A#5 T28 GTL_A#6 R27 GTL_A#7 U23 GTL_A#8 U24 GTL_A#9 R24 GTL_A#10 U28 GTL_A#11 V28 GTL_A#12 U27 GTL_A#13 T27 GTL_A#14 V27 GTL_A#15 U25 GTL_A#16 V26 GTL_A#17 Y24 GTL_A#18 V25 GTL_A#19 V23 GTL_A#20 W25 GTL_A#21 Y25 AA27 GTL_A#22 GTL_A#23 W24 GTL_A#24 W23 GTL_A#25 W27 GTL_A#26 Y27 AA28 GTL_A#27 GTL_A#28 W28 AB27 GTL_A#29 GTL_A#30 Y26 AB28 GTL_A#31 T26 AA26 GTL_REQ#0 GTL_REQ#1 GTL_REQ#2 GTL_REQ#3 GTL_REQ#4 R28 P25 R23 R25 T23 HA[3]# HA[4]# HA[5]# HA[6]# HA[7]# HA[8]# HA[9]# HA[10]# HA[11]# HA[12]# HA[13]# HA[14]# HA[15]# HA[16]# HA[17]# HA[18]# HA[19]# HA[20]# HA[21]# HA[22]# HA[23]# HA[24]# HA[25]# HA[26]# HA[27]# HA[28]# HA[29]# HA[30]# HA[31]# HADSTB[0]# HADSTB[1]# HREQ[0]# HREQ[1]# HREQ[2]# HREQ[3]# HREQ[4]# BCLK BCLK# ADS# DRDY# DEFER# HTRDY# RS[0]# RS[1]# RS[2]# RSTIN# BREQ0# BNR# BPRI# DBSY# HITM# HIT# HLOCK# DPSLP# CPURST# PWROK DPWR# HL[0] HL[1] HL[2] HL[3] HL[4] HL[5] HL[6] HL[7] HL[8] HL[9] HL[10] HLSTB HLSTB# HLVREF HLZCOMP HYRCOMP HXRCOMP PSWING HYSWING HXSWING AGPBUSY# HD[0]# HD[1]# HD[2]# HD[3]# HD[4]# HD[5]# HD[6]# HD[7]# HD[8]# HD[9]# HD[10]# HD[11]# HD[12]# HD[13]# HD[14]# HD[15]# HDSTBP[0]# HDSTBN[0]# DINV[0]# HD[16]# HD[17]# HD[18]# HD[19]# HD[20]# HD[21]# HD[22]# HD[23]# HD[24]# HD[25]# HD[26]# HD[27]# HD[28]# HD[29]# HD[30]# HD[31]# HDSTBP[1]# HDSTBN[1]# DINV[1]# HD[32]# HD[33]# HD[34]# HD[35]# HD[36]# HD[37]# HD[38]# HD[39]# HD[40]# HD[41]# HD[42]# HD[43]# HD[44]# HD[45]# HD[46]# HD[47]# HDSTBP[2]# HDSTBN[2]# DINV[2]# HD[48]# HD[49]# HD[50]# HD[51]# HD[52]# HD[53]# HD[54]# HD[55]# HD[56]# HD[57]# HD[58]# HD[59]# HD[60]# HD[61]# HD[62]# HD[63]# HDSTBP[3]# HDSTBN[3]# DINV[3]# HDVREF[0] HDVREF[1] HDVREF[2] HAVREF HCCVREF K22 H27 K25 L24 J27 G28 L27 L23 L25 J24 H25 K23 G27 K26 J23 H26 K27 J28 J25 F25 F26 B27 H23 E27 G25 F28 D27 G24 C28 B26 G22 C26 E26 G23 B28 D26 C27 E25 B21 G21 C24 C23 D22 C25 E24 D24 G20 E23 B22 B23 F23 F21 C20 C21 E21 E22 B25 G18 E19 E20 G17 D20 F19 C19 C17 F17 B19 G16 E16 C16 E17 D16 C18 E18 D18 G19 K21 J21 J17 Y22 Y28 HDVREF GTL_D#48 GTL_D#49 GTL_D#50 GTL_D#51 GTL_D#52 GTL_D#53 GTL_D#54 GTL_D#55 GTL_D#56 GTL_D#57 GTL_D#58 GTL_D#59 GTL_D#60 GTL_D#61 GTL_D#62 GTL_D#63 GTL_DSTBP#3 4 GTL_DSTBN#3 4 GTL_DINV#3 4 HDVREF 9 GTL_D#32 GTL_D#33 GTL_D#34 GTL_D#35 GTL_D#36 GTL_D#37 GTL_D#38 GTL_D#39 GTL_D#40 GTL_D#41 GTL_D#42 GTL_D#43 GTL_D#44 GTL_D#45 GTL_D#46 GTL_D#47 GTL_DSTBP#2 4 GTL_DSTBN#2 4 GTL_DINV#2 4 GTL_D#16 GTL_D#17 GTL_D#18 GTL_D#19 GTL_D#20 GTL_D#21 GTL_D#22 GTL_D#23 GTL_D#24 GTL_D#25 GTL_D#26 GTL_D#27 GTL_D#28 GTL_D#29 GTL_D#30 GTL_D#31 GTL_DSTBP#1 4 GTL_DSTBN#1 4 GTL_DINV#1 4 GTL_D#0 GTL_D#1 GTL_D#2 GTL_D#3 GTL_D#4 GTL_D#5 GTL_D#6 GTL_D#7 GTL_D#8 GTL_D#9 GTL_D#10 GTL_D#11 GTL_D#12 GTL_D#13 GTL_D#14 GTL_D#15 GTL_DSTBP#0 4 GTL_DSTBN#0 4 GTL_DINV#0 4 U14A GTL_D#[63..0] 4 12,13 M_A[12..0] M_A0 M_A1 M_A2 M_A3 M_A4 M_A5 M_A6 M_A7 M_A8 M_A9 M_A10 M_A11 M_A12 12,13 12,13 12,13 12,13 M_AB1 M_AB2 M_AB4 M_AB5 AC18 AD14 AD13 AD17 AD11 AC13 AD8 AD7 AC6 AC5 AC19 AD5 AB5 AD16 AC12 AF11 AD10 AD25 AC24 AC21 SMA[0] SMA[1] SMA[2] SMA[3] SMA[4] SMA[5] SMA[6] SMA[7] SMA[8] SMA[9] SMA[10] SMA[11] SMA[12] SMAB[1] SMAB[2] SMAB[4] SMAB[5] SWE# SCAS# SRAS# SDQS[0] SDM[0] SDQ[0] SDQ[1] SDQ[2] SDQ[3] SDQ[4] SDQ[5] SDQ[6] SDQ[7] SDQS[1] SDM[1] SDQ[8] SDQ[9] SDQ[10] SDQ[11] SDQ[12] SDQ[13] SDQ[14] SDQ[15] SDQS[2] SDM[2] SDQ[16] SDQ[17] SDQ[18] SDQ[19] SDQ[20] SDQ[21] SDQ[22] SDQ[23] SDQS[3] SDM[3] SDQ[24] SDQ[25] SDQ[26] SDQ[27] SDQ[28] SDQ[29] SDQ[30] SDQ[31] SDQS[4] SDM[4] SDQ[32] SDQ[33] SDQ[34] SDQ[35] SDQ[36] SDQ[37] SDQ[38] SDQ[39] SDQS[5] SDM[5] SDQ[40] SDQ[41] SDQ[42] SDQ[43] SDQ[44] SDQ[45] SDQ[46] SDQ[47] SDQS[6] SDM[6] SDQ[48] SDQ[49] SDQ[50] SDQ[51] SDQ[52] SDQ[53] SDQ[54] SDQ[55] SMRCOMP SMVREF_0 AG2 AE5 AF2 AE3 AF4 AH2 AD3 AE2 AG4 AH3 AH5 AE6 AD6 AG5 AG7 AE8 AF5 AH4 AF7 AH6 M_DQS0 M_DM0 M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7 M_DQS1 M_DM1 M_DATA8 M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15 M_DATA[71..0] 13 M_DQS[8..0] 13 M_DM[8..0] 13

+1.5VRUN 1

ITP

R113 226R3F 2 PSWING R142 147R3F C190 SCD01U50V3KX HLVREF R143 113R3F

C54 SCD1U16V3KX 2

800 mV +/-8%

DDR MEMORY

1

Close to pin

350 mV +/-8%
C55 SCD01U50V3KX

C53 SCD1U16V3KX 2

12,13 M_WE# 12,13 M_CAS# 12,13 M_RAS#

1

Close to pin

HOST

12,13 M_BS0# 12,13 M_BS1# 12,13 12,13 12,13 12,13 12,13 12,13 12,13 12,13 M_CS0_R# M_CS1_R# M_CS2_R# M_CS3_R# M_CKE0_R# M_CKE1_R# M_CKE2_R# M_CKE3_R#

AD22 AD20 AD23 AD26 AC22 AC25 AC7 AB7 AC9 AC10 AB2 AA2 AC26 AB25 AC3 AD4 AC2 AD2 AB23 AB24 AA3 AB4 M_DQS7 M_DM7 M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63 M_DQS8 M_DM8 M_DATA64 M_DATA65 M_DATA66 M_DATA67 M_DATA68 M_DATA69 M_DATA70 M_DATA71 AH27 AH28 AH26 AE26 AG28 AF28 AG26 AF26 AE27 AD27 AD15 AH15 AG14 AE14 AE17 AG16 AH14 AE15 AF16 AF17 AJ22 AJ19

SBA[0] SBA[1] SCS[0]# SCS[1]# SCS[2]# SCS[3]# SCKE[0] SCKE[1] SCKE[2] SCKE[3] SCK[0] SCK[0]# SCK[1] SCK[1]# SCK[2] SCK[2]# SCK[3] SCK[3]# SCK[4] SCK[4]# SCK[5] SCK[5]# SDQS[7] SDM[7] SDQ[56] SDQ[57] SDQ[58] SDQ[59] SDQ[60] SDQ[61] SDQ[62] SDQ[63] SDQS[8] SDM[8] SDQ[64] SDQ[65] SDQ[66] SDQ[67] SDQ[68] SDQ[69] SDQ[70] SDQ[71] SMVSWINGL SMVSWINGH MONTARA-GM

4 GTL_ADSTB#0 4 GTL_ADSTB#1 4 GTL_REQ#[4:0]

AH8 M_DQS2 AE9 M_DM2 AF8 M_DATA16 AG8 M_DATA17 AH9 M_DATA18 AG10M_DATA19 AH7 M_DATA20 AD9 M_DATA21 AF10 M_DATA22 AE11 M_DATA23 AE12 M_DQS3 AH12 M_DM3 AH10 M_DATA24 AH11 M_DATA25 AG13M_DATA26 AF14 M_DATA27 AG11M_DATA28 AD12 M_DATA29 AF13 M_DATA30 AH13 M_DATA31 AH17 M_DQS4 AD19 M_DM4 AH16 M_DATA32 AG17M_DATA33 AF19 M_DATA34 AE20 M_DATA35 AD18 M_DATA36 AE18 M_DATA37 AH18 M_DATA38 AG19M_DATA39 AE21 M_DQS5 AD21 M_DM5 AH20 M_DATA40 AG20M_DATA41 AF22 M_DATA42 AH22 M_DATA43 AF20 M_DATA44 AH19 M_DATA45 AH21 M_DATA46 AG22M_DATA47 AH24 M_DQS6 AD24 M_DM6 AE23 M_DATA48 AH23 M_DATA49 AE24 M_DATA50 AH25 M_DATA51 AG23M_DATA52 AF23 M_DATA53 AF25 M_DATA54 AG25M_DATA55 AB1 SMRCOMP AJ24 C86 SCD1U16V3KX

3 CLK_MCH 3 CLK_MCH# 4 GTL_ADS# 4 GTL_DRDY# 4 GTL_DEFER# 4 GTL_TRDY# 4 GTL_RS#0 4 GTL_RS#1 4 GTL_RS#2 10,16,18,20,23,26,29 PCIRST# 4 GTL_BR0# 4 GTL_BNR# 4 GTL_BPRI# 4 GTL_DBSY# 4 GTL_HITM# 4 GTL_HIT# 4 GTL_LOCK# 4,16 CC_DPSLP# 4,6 GTL_CPURST# 4 GTL_DPWR# HL_0 HL_1 HL_2 HL_3 HL_4 HL_5 HL_6 HL_7 HL_8 HL_9 HL_10 HLVREF 2 27D4R3F HYRCOMP HXRCOMP PSWING HYSWING HXSWING

AE29 AD29 L28 N24 M28 M25 N23 P26 M27 AD28 M23 N25 P28 M26 N28 N27 P27 Y23 F15 GMCH_PWROK J11 AA22 U7 U4 U3 V3 W2 W6 V6 W7 T3 V5 V4 W3 V2 W1 T2 H28 B20 U2 K28 B18 F7

VCC_IO 1

R115 301R3F 2 HYSWING

12 CLK_DDR0 12 CLK_DDR0# 12 CLK_DDR1 12 CLK_DDR1# 12 CLK_DDR2 12 CLK_DDR2# 12 CLK_DDR3 12 CLK_DDR3# 12 CLK_DDR4 12 CLK_DDR4# 12 CLK_DDR5 12 CLK_DDR5# +2.5VSUS 1

+2.5VSUS 1 R145 60D4R3F SMRCOMP 2 1 R144 60D4R3F 2

1

R116 150R3F 2

2

C37 SCD1U16V3KX

R219 604R3F SMVSWINGL C85 SCD1U16V3KX

*S.C.
C56 SCD1U16V3KX ZZ.10421.2B1

VCC_IO 1

HUB LINK

R213 150R3F 2

R54 301R3F HXSWING 15 HL_[10:0] +1.2VRUN 15 HL_STB 15 HL_STB# 1 R112 1 R114 1 R56 2 27D4R3F 2 27D4R3F 2

+2.5VSUS 1 R500 150R3F 2 SMVSWINGH

1

R55 150R3F 2

1

DDR_VREF

C27 SCD1U16V3KX

HXRCOMP,HYRCOMP as 18mil wide trace
16 AGPBUSY#

R501 604R3F 2

1

C214 SCD1U16V3KX

op buffer build-in to SC1486.

HAVREF HCCVREF

HAVREF 9 HCCVREF 9

R444 16,34 DELAY_IMVP_PWRGD 1 2 DUMMY-R3 3,34 CK408_IMVP_PWRGD 1 R445 0R3-U 2 GMCH_PWROK

Wistron Corporation
MONTARA-GM Title 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Montara (1 of 3)
Size A3 Document Number

PEBBLE--02203
Sheet 7 of

Rev SD 40

Date: Thursday, March 13, 2003

U14E AA29 W29 U29 N29 L29 J29 G29 E29 C29 AE28 AC28 E28 D28 AJ27 AG27 AC27 F27 A27 AJ26 AB26 W26 U26 R26 N26 L26 J26 G26 AE25 AA25 D25 A25 AG24 AA24 V24 T24 P24 M24 K24 H24 F24 B24 AJ23 AC23 AA23 D23 A23 AE22 W22 U22 R22 N22 L22 J22 F22 C22 AG21 AB21 AA21 Y21 V21 T21 P21 M21 H21 D21 A21 AJ20 AC20 AA20 J20 F20 AE19 AB19 H19 D19 A19 AJ18 AG18 AA18 J18 F18 AC17 AB17 U17 R17 N17 H17 D17 A17 AE16 AA16 T16 P16 J16 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AE13 AB13 U13 R13 N13 H13 F13 D13 A13 AJ12 AG12 AA12 J12 AJ11 AC11 AB11 H11 F11 D11 AJ10 AE10 AA10 J10 C10 AG9 AB9 W9 U9 T9 R9 N9 L9 E9 AC8 Y8 V8 T8 P8 K8 H8 AJ7 AE7 AA7 R7 M7 J7 G7 E7 C7 AG6 Y6 L6 Y5 U5 B5 AE4 AC4 AA4 W4 T4 N4 K4 G4 D4 AJ3 AG3 R2 AJ1 AE1 AA1 U1 L1 G1 C1 F16 AG15 AB15 U15 R15 N15 H15 D15 AC14 AA14 T14 P14 J14 B8 B11 R417 1KR3 GST[1] R612 1 ADDID7 GST[0] 1

+1.5VRUN 2 2

DUMMY-R3 R613 1 2 DUMMY-R3 R614 2 DUMMY-R3 S.B.

TP68

GST[2]

1

U14B 10 DVO_D[0..11] DVO_D0 DVO_D1 DVO_D2 DVO_D3 DVO_D4 DVO_D5 DVO_D6 DVO_D7 DVO_D8 DVO_D9 DVO_D10 DVO_D11 10 DVOB_CLK 10 DVOB_CLK# 10 DVOB_FLDSTL 10 DVOB_HSYNC 10 DVOB_VSYNC 10 DVOB_BLANK 10 DVOB_CINTR# 10 DVOB_CCLKINT 1 R109 100KR3 2 +1.5VRUN 1 R3 R5 R6 R4 P6 P5 N5 P2 N2 N3 M1 M5 P3 P4 M2 T6 T5 L2 G2 M3 K5 K1 K3 K2 J6 J5 H2 H1 H3 H4 H6 G3 J3 J2 H5 K6 L5 L3 D1 F1 Y3 D5 B7 B17 D6 R146 10R3 2 2

GND

+1.5VRUN 2

DVOBD[0] DVOBD[1] DVOBD[2] DVOBD[3] DVOBD[4] DVOBD[5] DVOBD[6] DVOBD[7] DVOBD[8] DVOBD[9] DVOBD[10] DVOBD[11] DVOBCLK DVOBCLK# DVOBFLDSTL DVOBHSYNC DVOBVSYNC DVOBBLANK# DVOBCINTR# DVOBCCLKINT DVOCD[0] DVOCD[1] DVOCD[2] DVOCD[3] DVOCD[4] DVOCD[5] DVOCD[6] DVOCD[7] DVOCD[8] DVOCD[9] DVOCD[10] DVOCD[11] DVOCCLK DVOCCLK# DVOCFLDSTL DVOCHSYNC DVOCVSYNC DVOCBLANK# DVORCOMP GVREF GCLKIN DPMS DREFCLK DREFSSCLK EXTTS_0

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

L7 E5 F5 E3 E2 G5 F4 G6 F6 F12 D12 B12 AA5 L4 C4 F3 D3 C3 B3 F2 D2 C2 B2 D7

DDCA_DATA DDCA_CLK DDCPDATA DDCPCLK RED RED# GREEN GREEN# BLUE BLUE# HSYNC VSYNC

G9 B6 C5 B4 A7 A8 C8 D8 C9 D9 H10 J9 G8 F8 A5 F14 G14 E14 E15 C14 C15 B13 C13 E13 D14 G12 H12 E11 E12 C11 C12 G10 G11 E10 F10 H9 C6 P7 T7 N7 M6 K7 N6 E8 A10 1 R53 1K5R3F 2 BL_PWM

DAT_DDC1 11 CLK_DDC1 11 DAT_DDC_EDID 11 CLK_DDC_EDID 11 DAC_RED 11,27 DAC_GREEN 11,27 DAC_BLUE 11,27 DAC_HSYNC 11 DAC_VSYNC 11 TP143 S.B. BL_ON 11 LCDVDD_ON 11 TXOUT0+ TXOUT0TXOUT1+ TXOUT1TXOUT2+ TXOUT211 11 11 11 11 11

DVOB

CRT

short trace

R110 100KR3 1

VIDEO

PANELBKLTCTL PANELBKLTEN PANELVDDEN IYAP[0] IYAM[0] IYAP[1] IYAM[1] IYAP[2] IYAM[2] IYAP[3] IYAM[3] ICLKAP ICLKAM IYBP[0] IYBM[0] IYBP[1] IYBM[1] IYBP[2] IYBM[2] IYBP[3] IYBM[3] ICLKBM ICLKBP LCLKCTLA LCLKCTLB MDDCCLK MDDCDATA MDVICLK MDVIDATA MI2CCLK MI2CDATA REFSET LIBG

LVDS DVOC

TXCLK+ 11 TXCLK- 11

+1.5VRUN

+5VRUN

2

RN1 SRN2D7KJ 3 4 2 RN2 SRN10KJ

R80 2K7R3F 2

R79 2K7R3F

3 4 RN88 SRN8K2J 2 1

R83 1KR3F GVREF 1 C31 SCD1U16V3KX 1 R82 100KR3 2 40D2R3F GVREF

+1.5VRUN 3 4 1 1 3 CHT2222A Q12 S.B.2 MI2C_SCLK 10 MI2C_SDAT 10 REFSET 1

1

R111 2

S.B. S.B.

CH7009_SPC 10 CH7009_SPD 10

CHT2222A Q13 S.B.2

2

2 1

1

R81 1KR3F

2 1

DVI_SCLK 27

3 CLK66_GMCH 3 CLK48_DREF 3 DREFSSCLK 1 1 R385 10R3 2 R51 10R3 1

MDVI_CLK MDVI_DAT

3

DVI_SDAT 27

NC NC NC NC NC NC NC NC NC NC NC NC NC NC

1 R418 127R3F

C130 SC10P

C22 SC10P

C52 SC10P

AJ29 TP37 AH29 TP38 B29 TP7 A29 TP6 AJ28 TP36 A28 TP5 AA9 TP83 AJ4 TP35 AJ2 TP34 A2 TP4 AH1 TP33 B1 TP10 M_RCVI# AC16 M_RCVO# AC15

MONTARA-GM

*S.C.

*SD
Need connect to cap first (C252,C253 on next page) then to GND

NS
+1.5VRUN 1

Proto-1B

VSSADAC VSSALVDS

1

R415 10KR3

2

R416 1KR3 2 CLK48_DPMS D S Q54 2N7002

EXTTS 6

DDR Feedback(inside the package) Route transitioned to buttom side with vias near ball

TP85 TP84

+3VRUN

2

MONTARA-GM

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

16 PM_SUS_CLK

1 G 2

3

Montara (2 of 3)
Size A3 Document Number

PEBBLE--02203
Sheet 8 of

Rev SD 40

Date: Thursday, March 13, 2003

+1.5VRUN U14D P9 M9 K9 R8 N8 M8 L8 J8 H7 E6 M4 J4 E4 N1 J1 E1 W21 AA19 AA17 T17 P17 U16 R16 N16 AA15 T15 P15 J15 U14 R14 N14 H14 T13 P13 A12 D10 B10 F9 B15 B14 J13 G13 A11 A6 B16 Y2 D29 B9 A9 1 +3VRUN A3 A4 V9 W8 U8 V7 U6 W5 Y1 V1 VCCGPIO VCCGPIO VCCHL VCCHL VCCHL VCCHL VCCHL VCCHL VCCHL VCCHL VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCCDVO VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCQSM VCCQSM VCCASM VCCASM VTTHF VTTHF VTTHF VTTHF VTTHF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF VTTLF AG29 AF29 AC29 AF27 AJ25 AF24 AB22 AJ21 AF21 AB20 AF18 AB18 AJ17 AB16 AF15 AB14 AJ13 AA13 AF12 AB12 AA11 AB10 AJ9 AF9 Y9 AB8 AA8 Y7 AF6 AB6 AA6 AJ5 Y4 AF3 AB3 AG1 AC1 AJ8 AJ6 AF1 AD1 V29 M29 H29 A24 A22 AB29 Y29 K29 F29 A26 V22 T22 P22 M22 H22 U21 R21 N21 L21 H20 A20 J19 H18 A18 H16 G15 1 1 1 1

+2.5VSUS

1

1

1

1

1

1

2

2

2

2

2

2

2

2

2

2

S.B.

1

1

1

1

1

2

2

2

2

2

SB

+1.2VRUN

1

1

1

1

1

1

1

2

2

2

2

2

2

S.B.

2

C193 SCD1U10V2MX-1

C166 SCD1U10V2MX-1

C168 SCD1U10V2MX-1

C197 C196 SCD1U10V2MX-1 SC10U6D3V5MX

TC6 ST150U6D3V-1-U

TC5 ST150U6D3V-1-U

POWER

+2.5VSUS L17 VCC_QSM 1 C84 C83 SCD1U10V2MX-1 SC4D7U10V-U VSS_QSM 1 2 IND-D68UH-2 R208 1 +1.2VRUN 1 1 1 VCC_ASM 2 C68 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 2 L16 IND-1UH-5 2 1R5 2

+2.5VSUS

Caps for VCCTXLVDS
1 1 1 1

2

2

2

2

S.C. For A12

S.B.

2

C300 SCD1U10V2MX-1

C129 SC22U10V-1

C128 SC22U10V-1

C147 C146 C148 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1

C40,C39,R654 should on the same side

+1.5VRUN

Caps for VCCDLVDS
1 1 1 1 C301 SCD1U10V2MX-1 C302 SCD1U10V2MX-1 C303 SCD1U10V2MX-1 C132 SC22U10V-1 C131 SC22U10V-1 C149 SCD1U10V2MX-1

VCCTXLVDS VCCTXLVDS VCCTXLVDS VCCTXLVDS VCCDLVDS VCCDLVDS VCCDLVDS VCCDLVDS VCCALVDS VCCADPLLA VCCADPLLB VCCAGPLL VCCAHPLL VCCADAC VCCADAC

TC8 ST100U6D3V-U

S.C.

2

2

2

+1.5VRUN

S.C. For G13

S.C. For J13

+1.2VRUN 1

S.C. For B14
R50 1R5

S.B.
L7 IND-D1UH

2

Current:~440mA
C202 C170 C150 C134 C133 1 1 1 1 1

C41,TC36 should on the same side

Caps for VCCALVDS
1

+1.5VRUN 2 1 TC19 C21 ST220U4VDM-1 SCD1U10V2MX-1 2 1 VCC_ADPLLA VCC_ADPLLB

2 VCCADPLLA 1

2 2 2 2 2

2

2

C24 SCD1U10V2MX-1

C25 SCD01U50V3KX

ESR<50mohm,ESL<2.5mH +1.2VRUN TC19,C21 on the same side
1 R52 1R5 2 VCCADPLLB 1 L8

S.B.

+1.5VRUN

1

1

1

2

2

Caps for VCCGPIO

S.B.

2

2

2

+1.2VRUN 1 C20 SCD1U10V2MX-1 1 C19 SC10U6D3V5MX

+1.2VRUN

S.B. ESR<15mohm

2

2

S.B.

+1.2VRUN C191 SCD1U10V2MX-1

2

1

Cap for VCCAGPLL

1

Caps for VCCHL
1 1 1

2

+1.2VRUN

C151 SCD1U10V2MX-1

Cap for VCCAHPLL

MONTARA-GM

2

2

S.B.

+1.5VRUN

2

C192 SC10U6D3V5MX

C189 C194 SCD1U10V2MX-1 SCD1U10V2MX-1

Caps for VCCADAC
1

Reference Voltage: 2/3 Vcc_IO
VCC_IO 1 VCC_IO 1 VCC_IO 1

2

C145 SCD1U10V2MX-1

C23 SCD01U50V3KX

R148 49D9R3F

R448 49D9R3F 2 2

R446 49D9R3F

This two cap chould connect to VSSADAC first then to GND

2

2

TC7 ST150U6D3V-1-U

C152 SC10U6D3V5MX

C167 C199 SCD1U10V2MX-1 SCD1U10V2MX-1

1

+3VRUN

1

IND-D1UH

2 TC20 C26 ST220U4VDM-1 SCD1U10V2MX-1

VCC_IO

ESR<50mohm,ESL<2.5mH TC20,C26 on the same side

7 HCCVREF

HCCVREF 1

7 HAVREF R147 100R3F

HAVREF 1 R449 100R3F

7 HDVREF

HDVREF 1 R447 100R3F

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

C57 BC100 SCD1U16V3KX SC1U10V5KX 2

BC406 C200 SC1U10V5KX SCD1U16V3KX 2

C169 SCD1U16V3KX

BC405 SC1U10V5KX 2

Montara (3 of 3)
Size A3 Document Number

2

C210 C212 C211 C188 TC37 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 ST150U6D3VM-U

1

TC9 ST150U6D3V-1-U

2

TC27 ST150U6D3V-1-U

C165 C164 C144 SC10U6D3V5MXSCD1U10V2MX-1 SCD1U10V2MX-1

C216

C217

C201

C198

C195

C213

1

C215

SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1

PEBBLE--02203
Sheet 9 of

Rev SD 40

Date: Thursday, March 13, 2003

R624 8 CH7009_SPD 1 2 DUMMY-R3 R625 1 2 DUMMY-R3 +1.5VRUN

S.B.

8 CH7009_SPC

S.B.
+3VRUN +3VRUN D39 2 3 R376 2K7R3F 3 4 RN89 SRN4D7KJ 1 BAV99LT1 R378 1 1KR3

DVI_TX0- 27 DVI_TX0+ 27 DVI_TX1- 27 DVI_TX1+ 27 DVI_TX2- 27 DVI_TX2+ 27 DVI_CLK+ 27 DVI_CLK- 27 2

Note: For the TX[2:0]- , TX[2:0]+ and CLK-, CLK+ ,keeping these trace short and matched
DVI_DETECT 27 DVOB_FLDSTL 8

RN90 SRN2D7KJ 2

R410 2K7R3F 2

R413 75R3 1 2

TV_Y/G 27 R412 75R3 1 2 TV_C/R 27 R411 75R3 1 2 TV_COMP 27

3 4

1

2 1

1

2 1

8 MI2C_SDAT

8 MI2C_SCLK

CHT2222A Q53 S.B.2

BCO C/HSYNC CVBS

1

47 48 36 37 38 39 1 12 49 6 11 64 45 23 29 20 26 32 18 44 16 17 41 33 34 40 1 75R3 R414 2

BC66

BC40

BC38

1

3

3 BC366 BC365 SC22P

BC389

1

Address:76H

SC22P

D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 XCLK# XCLK DE

TDC0# TDC0 TDC1# TDC1 TDC2# TDC2 TLC TLC#

CHT2222A Q47 S.B.2

8 DVO_D[0..11] DVO_D11 DVO_D10 DVO_D9 DVO_D8 DVO_D7 DVO_D6 DVO_D5 DVO_D4 DVO_D3 DVO_D2 DVO_D1 DVO_D0 50 51 52 53 54 55 58 59 60 61 62 63 56 57 2 46 4 5 13 CH7009A_SPD CH7009A_SPC 14 15 8 7 R106 1 R46 1 140R3F 2 CH7009_ISET 2D4KR3 2 CH7009_VSWING 10 35 19 3

21 22 24 25 27 28 30 31

1

U12 HPDET 9 CH7009_DVDD 1 L36

+3VRUN

S.B.

2

2

SCD1U16V3KX SCD1U16V3KX SCD1U16V3KX

MLB-160808-11 BC391 SC10U10V-U1

S.C.
L35

+1.5VRUN CH7009_DVDDV 1 BC390 SC10U10V-U1

CH7009B

Y/G C/R CVBS/B DVDD DVDD DVDD DGND DGND DGND DVDDV TVDD TVDD TGND TGND TGND AVDD AVDD AGND AGND AGND VDD GND GND

S.B.

2

MLB-160808-11

8 DVOB_CLK# 8 DVOB_CLK 8 DVOB_BLANK +3VRUN 8 DVOB_CCLKINT 8 DVOB_HSYNC 8 DVOB_VSYNC R381 10KR3 2 7,16,18,20,23,26,29 PCIRST#

2

SCD1U16V3KX

S.C.

+3VRUN L37

CH7009_TVDD 1 BC65 SCD1U16V3KX BC64 SCD1U16V3KX 1 BC387 SC10U10V-U1

S.B.

R651 1 2 DUMMY-R3

2

P-OUT/TLDET# H V RESET# SPD SPC GPIO0 GPIO1/TLDET# AS ISET VSWING XO VREF XI/FIN

MLB-160808-11

1

1

1

2

R377

R383

S.C.

+3VRUN CH7009_AVDD 1 BC83 BC37 1 L9

S.B.

2

2

DUMMY-R3 DUMMY-R3

2

8 DVOB_CINTR#

2

SCD1U16V3KX SCD1U16V3KX

S.C.

MLB-160808-11 BC84 SC10U10V-U1 +3VRUN

1

1

1

H/W Setting:
2

R380 374KR3

R382

R379

CH7009_VDD BC80 SCD1U16V3KX 1

L38 1

S.B.

2

CH7009A Address AS High Low 0X75 0X76 NTSC or PAL GPIO0 High NTSC Low PAL DVI or TV out GPIO1 High DVI Low TV

2

2

DUMMY-R3 DUMMY-R3

2

42

43

CH7009B-T

S.C.

BC388 SC10U10V-U1

MLB-160808-11

S.C.
+5VRUN 2 1 2 2 1 D71 B0530W 1 +5VRUN_MIC5205 C161 SCD1U16V3KX 1 2 3 U64 IN GND EN OUT ADJ 2 C162 SC2D2U10V5KX +1.5VRUN X1 CH7009_TVDD_A

Note:H/W settingbe deleted once its default option has been determined by manufacturer.For NTSC/PAL and DVI/TV options can be changed by s/w after power up.

Note: Place R126 close to pin35. Place R127 close to pin19. Connect R126 and R127 ' S AGND to pin34

R48 10KR3F 1

1 R652 226KR3F 1 2 R653 374KR3 2

X-14D318MHZ-1-U

BC81 SC22P

BC82 SC22P

5 4 1 2

2

BC39 SCD1U16V3KX 1

R47 10KR3F

MIC5205BM5 74.05205.B3F

Note: Place BC81 and BC82 close to CH7009A and X1

C163 SC470P50V2KX

S.D.

Layout note: 1.route TV out signals trace Zo=75ohm. 2.each GND pin should connect directly to its respective decoupling cap GND lead,then connected to the GND plane.

S.C. For EMI request
CH7009_AVDD 1 1

(each pin for one cap)
CH7009_DVDD 1 1

Wistron Corporation
2 C307 SC1000P50V C308 SC1000P50V 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 1

2

2

2

2

C304 SC1000P50V

C305 SC1000P50V

C306 SC1000P50V

S-VIDEO/DVI
Size A3 Document Number

PEBBLE--02203
Sheet 10 of

Rev SD 40

Date: Thursday, March 13, 2003

Ferrite bead impedance: 22ohm@100MHz
8,27 DAC_RED L32 *SD 1 2 BLM18BB220SN1 L31 *SD 1 2 BLM18BB220SN1 L34 *SD 1 2 BLM18BB220SN1 1 1 1 R8 R9 R22 75R3F 75R3F 75R3F 2 2 2 BC12 SC3P50V3CN BC13 SC3P50V3CN BC11 SC3P50V3CN C114 SC3P50V3CN C10 SC3P50V3CN C9 SC3P50V3CN CRT_R CRT_G CRT_B +3VRUN

CRT
+5VRUN D1 1 CRT_VCC 2 BC340 SCD01U50V3KX R6 2K2R3 16 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 17 2 +3VRUN 1 RB751V-40-U

8,27 DAC_GREEN

S.C.
1 R352 10KR3 R7 2K2R3 2 1

1

1

8,27 DAC_BLUE

R363 2K2R3 2 +1.5VRUN 8 DAT_DDC1 2

R351 2K2R3

CN1

1

2

CRT_R 3 DAT_DDC1_5 CRT_G CRT_B JVGA_HS JVGA_VS CLK_DDC1_5

G

No Stuff

No Stuff
+5VRUN 8 7 6 5

2 Q42 S 2N7002

D DAT_DDC1_5 27 CLK_DDC1_5 27

U3 PACDN009 BC341 SCD1U16V3KX 8 CLK_DDC1 1 2 3 4

1

Q43 2 S

2N7002 3 D

to docking

G

JVGA_HS 27 JVGA_VS 27 L30 3 HSYNC_5 1 33R3 L2 1 33R3 +5VRUN D2 1 D32 +5VRUN 1 BC3 SC3D3P50V BC339 SC3D3P50V BC2 SC3D3P50V BC338 SC3D3P50V 2 JVGA_VS 2 JVGA_HS

*S.C.

14

1

R24 8 DAC_HSYNC 1 39R3 14 R10 8 DAC_VSYNC 1 39R3 7 2 5 6 U1B TSAHCT125-1 4 7 2 2

to docking

VIDEO-15-17-U 20.20235.015

U1A TSAHCT125-1 VSYNC_5

3 DA204U-U1

S.C.

3 DA204U-U1

2

S.C.

No Stuff

2

Layout Note: Must be a ground return path for CRT_R,CRT_G,CRT_B check list 0.70 said Tie to GND??

CN4 +5VSUS +5VALW PWR_SRC 1 BC17 SC1000P50V3KX 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

G1 G5 MH1 +3VSUS Q40 SI3456DV-U G3 BC346 SCD1U16V3KX 6 5 2 1 4 S 1 R359 100KR3 2 1 +12V LCDVDD

+3VRUN 1

BC19 SC1000P50V3KX

BC18 SC1000P50V3KX

NEED 60 MIL
2 BC349 SC10U10V-U1

R623 10KR3 28,39 PBAT_SMBDAT 28,39 PBAT_SMBCLK 2 8 BL_ON PBAT_SMBDAT PBAT_SMBCLK LAMP_STATE BL_ON 2

D 3G

15 LAMP_STAT LCDVDD

1

D69

SMB ADDRESS 50h (New)SMB ADDRESS 58h

S.C.

+3VRUN R366 1 +3VSUS 2 DUMMY-R3 1 R358 10KR3 2

caps place near LCD connector
BC347 SCD01U50V3KX

*SD

S1N4148-U

BC20 SCD1U16V3KX BC21 SCD1U16V3KX BC22 SCD1U16V3KX

+3VRUN

CLK_DDC_EDID DAT_DDC_EDID

3 3 OUT 1 GND 1 G 2 28 FPVCC

8 TXOUT08 TXOUT0+ 8 TXOUT18 TXOUT1+

3 4

TXOUT0TXOUT0+ TXOUT1TXOUT1+ TXOUT2TXOUT2+ TXCLKTXCLK+

Q41 8 LCDVDD_ON 2 IN 1 R1

D S

Q44 2N7002

RN87 SRN2D7KJ 2 1

R2 DTC144EUA

R360 G4 DUMMY-R3 2

+3VRUN

8 CLK_DDC_EDID 8 DAT_DDC_EDID

8 TXOUT28 TXOUT2+ 8 TXCLK8 TXCLK+

LCD_ON#

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

C13 SCD1U16V3KX

MH2 G6 G2 HNA-CON40-U1 20.F0346.040

LCD/INVERTER CONN

*SD

DIFFERENTIAL GND MUST LAY AROUND SIGNAL AND CAN'T USE THE SAME PATH WITH PWR GND

LCD_INVERTER & CRT CONN.
Size A3 Document Number

PEBBLE--02203
Sheet 11 of

Rev SD 40

Date: Thursday, March 13, 2003

DM2 13 M_A_FR_[12..0] M_A_FR_0 7,13 M_A1 7,13 M_A2 M_A_FR_3 7,13 M_A4 7,13 M_A5 M_A_FR_6 M_A_FR_7 M_A_FR_8 M_A_FR_9 M_A_FR_10 M_A_FR_11 M_A_FR_12 13 M_BS0_FR# 13 M_BS1_FR# 13 M_DATA_R_[71..0] M_DATA_R_0 M_DATA_R_1 M_DATA_R_2 M_DATA_R_3 M_DATA_R_4 M_DATA_R_5 M_DATA_R_6 M_DATA_R_7 M_DATA_R_8 M_DATA_R_9 M_DATA_R_10 M_DATA_R_11 M_DATA_R_12 M_DATA_R_13 M_DATA_R_14 M_DATA_R_15 M_DATA_R_16 M_DATA_R_17 M_DATA_R_18 M_DATA_R_19 M_DATA_R_20 M_DATA_R_21 M_DATA_R_22 M_DATA_R_23 M_DATA_R_24 M_DATA_R_25 M_DATA_R_26 M_DATA_R_27 M_DATA_R_28 M_DATA_R_29 M_DATA_R_30 M_DATA_R_31 M_DATA_R_32 M_DATA_R_33 M_DATA_R_34 M_DATA_R_35 M_DATA_R_36 M_DATA_R_37 M_DATA_R_38 M_DATA_R_39 M_DATA_R_40 M_DATA_R_41 M_DATA_R_42 M_DATA_R_43 M_DATA_R_44 M_DATA_R_45 M_DATA_R_46 M_DATA_R_47 M_DATA_R_48 M_DATA_R_49 M_DATA_R_50 M_DATA_R_51 M_DATA_R_52 M_DATA_R_53 M_DATA_R_54 M_DATA_R_55 M_DATA_R_56 M_DATA_R_57 M_DATA_R_58 M_DATA_R_59 M_DATA_R_60 M_DATA_R_61 M_DATA_R_62 M_DATA_R_63 M_DATA_R_64 M_DATA_R_65 M_DATA_R_66 M_DATA_R_67 M_DATA_R_68 M_DATA_R_69 M_DATA_R_70 M_DATA_R_71 DM0_RESET# DM0_A13 DM0_BA2 112 111 110 109 108 107 106 105 102 101 115 100 99 117 116 5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190 71 73 79 83 72 74 80 84 85 86 97 98 123 124 200 118 120 119 DDR_VREF_SKT 1 2 197 199 202 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 / AP A11 A12 BA0 BA1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 NC NC/(RESET#) NC/A13 NC/BA2 NC NC NC /RAS /CAS /WE VREF VREF VDDSPD VDDID GND JAE-CONN200A-U 62.10017.371 /CS0 /CS1 CKE0 CKE1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 CK0 /CK0 CK1 /CK1 CK2 /CK2 121 122 96 95 11 25 47 61 133 147 169 183 77 12 26 48 62 134 148 170 184 78 35 37 160 158 89 91 195 193 194 196 198 9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192 3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186 201 M_DQS_R0 M_DQS_R1 M_DQS_R2 M_DQS_R3 M_DQS_R4 M_DQS_R5 M_DQS_R6 M_DQS_R7 M_DQS_R8 M_DM_R_0 M_DM_R_1 M_DM_R_2 M_DM_R_3 M_DM_R_4 M_DM_R_5 M_DM_R_6 M_DM_R_7 M_DM_R_8 M_DQS_R[8..0] 13 7,13 M_A[12..0] M_CS0_R# 7,13 M_CS1_R# 7,13 M_CKE0_R# 7,13 M_CKE1_R# 7,13 M_A0 7,13 M_AB1 7,13 M_AB2 M_A3 7,13 M_AB4 7,13 M_AB5 M_A6 M_A7 M_A8 M_A9 M_A10 M_A11 M_A12 7,13 M_BS0# 7,13 M_BS1# M_DATA_R_0 M_DATA_R_1 M_DATA_R_2 M_DATA_R_3 M_DATA_R_4 M_DATA_R_5 M_DATA_R_6 M_DATA_R_7 M_DATA_R_8 M_DATA_R_9 M_DATA_R_10 M_DATA_R_11 M_DATA_R_12 M_DATA_R_13 M_DATA_R_14 M_DATA_R_15 M_DATA_R_16 M_DATA_R_17 M_DATA_R_18 M_DATA_R_19 M_DATA_R_20 M_DATA_R_21 M_DATA_R_22 M_DATA_R_23 M_DATA_R_24 M_DATA_R_25 M_DATA_R_26 M_DATA_R_27 M_DATA_R_28 M_DATA_R_29 M_DATA_R_30 M_DATA_R_31 M_DATA_R_32 M_DATA_R_33 M_DATA_R_34 M_DATA_R_35 M_DATA_R_36 M_DATA_R_37 M_DATA_R_38 M_DATA_R_39 M_DATA_R_40 M_DATA_R_41 M_DATA_R_42 M_DATA_R_43 M_DATA_R_44 M_DATA_R_45 M_DATA_R_46 M_DATA_R_47 M_DATA_R_48 M_DATA_R_49 M_DATA_R_50 M_DATA_R_51 M_DATA_R_52 M_DATA_R_53 M_DATA_R_54 M_DATA_R_55 M_DATA_R_56 M_DATA_R_57 M_DATA_R_58 M_DATA_R_59 M_DATA_R_60 M_DATA_R_61 M_DATA_R_62 M_DATA_R_63 M_DATA_R_64 M_DATA_R_65 M_DATA_R_66 M_DATA_R_67 M_DATA_R_68 M_DATA_R_69 M_DATA_R_70 M_DATA_R_71 DM1_RESET# DM1_A13 DM1_BA2 112 111 110 109 108 107 106 105 102 101 115 100 99 117 116 5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190 71 73 79 83 72 74 80 84 85 86 97 98 123 124 200 118 120 119 2 DDR_VREF_SKT 1 2 197 199 201

DM1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 / AP A11 A12 BA0 BA1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 NC NC/(RESET#) NC/A13 NC/BA2 NC NC NC /RAS /CAS /WE VREF VREF VDDSPD VDDID GND /CS0 /CS1 CKE0 CKE1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 CK0 /CK0 CK1 /CK1 CK2 /CK2 121 122 96 95 11 25 47 61 133 147 169 183 77 12 26 48 62 134 148 170 184 78 35 37 160 158 89 91 195 SMBC_ICH 193 SMBD_ICH 194 DM1_SA0 196 198 9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192 3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186 202 1 1 M_DQS_R0 M_DQS_R1 M_DQS_R2 M_DQS_R3 M_DQS_R4 M_DQS_R5 M_DQS_R6 M_DQS_R7 M_DQS_R8 M_DM_R_0 M_DM_R_1 M_DM_R_2 M_DM_R_3 M_DM_R_4 M_DM_R_5 M_DM_R_6 M_DM_R_7 M_DM_R_8 CLK_DDR3 7 CLK_DDR3# 7 CLK_DDR4 7 CLK_DDR4# 7 CLK_DDR5 7 CLK_DDR5# 7 M_CS2_R# 7,13 M_CS3_R# 7,13 M_CKE2_R# 7,13 M_CKE3_R# 7,13

M_DM_R_[8..0] 13 CLK_DDR0 7 CLK_DDR0# 7 CLK_DDR1 7 CLK_DDR1# 7 CLK_DDR2 7 CLK_DDR2# 7 SMBC_ICH 3,16,18,23 SMBD_ICH 3,16,18,23 DM0_SA0 1 2

REVERSE TYPE

SCL SDA SA0 SA1 SA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS GND

NORMAL TYPE

R293 1 DUMMY-R3 +3VRUN

SCL SDA SA0 SA1 SA2 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS GND

R303 0R3-U 2 +3VRUN

R304 0R3-U 2

R302 DUMMY-R3

+2.5VSUS

+2.5VSUS

+3VRUN 1

TP136 TP135 TP138

TP57 TP137 TP58

2

C312 SCD1U10V2MX-1

13 M_RAS_FR# 13 M_CAS_FR# 13 M_WE_FR#

7,13 M_RAS# 7,13 M_CAS# 7,13 M_WE# +3VRUN 1 DDR_VREF 1 R558 0R3-U

* S.C.: place close pin197.
BC493 SCD1U16V3KX

+3VRUN

+3VRUN

2

C343 SCD1U10V2MX-1

BC494 SCD1U16V3KX

2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

S.B. bot side

* S.C.: place close pin197.

DDR-SODIMM200 62.10017.381

S.B. top side

DDR Socket
Size Document Number Custom

PEBBLE--02203
Sheet 12 of

Rev SD 40

Date: Thursday, March 13, 2003

SERIES DAMPING
PLACE RNs CLOSE TO DM0, < 0.75" STRICT EQUAL LENGTH LIMITATION WITH DQS, CB PINS
M_DATA50 M_DQS6 M_DATA56 M_DATA51 +1.25VRUN RN139 2 1 2 1 RN141 RN145 2 1 2 1 RN143 RN110 2 1 2 1 RN106 RN114 2 1 2 1 RN112 RN109 2 1 2 1 RN111 RN115 2 1 2 1 RN113 RN138 2 1 2 1 RN142 RN144 2 1 2 1 RN146 RN127 2 1 2 1 RN129 M_DQS8 M_A_FR_11 M_A_FR_6 M_A_FR_8 M_DATA_R_71 2 R550 10R3 R551 7,12 M_BS0# M_BS0# 1 10R3 R552 1 10R3 2 M_BS1_FR# M_BS1_FR# 12 2 M_BS0_FR# M_BS0_FR# 12 SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J 1 M_DQS_R8 RN21 SRN56-2-U2 M_DATA_R_4 1 4 M_DATA_R_5 2 3 M_DM_R_0 M_DATA_R_6 M_DATA_R_2 M_DQS_R0 RN22 SRN56-2-U2 1 4 2 3 RN58 SRN56-2-U2 1 4 2 3 M_DATA8 M_DATA3 M_DQS1 M_DATA9 RN100 2 1 2 1 RN102 RN96 2 1 2 1 RN98 RN132 2 1 2 1 RN128 RN136 2 1 2 1 RN130 RN131 2 1 2 1 RN133 RN135 2 1 2 1 RN137 RN105 2 1 2 1 RN103 RN99 2 1 2 1 RN97 RN104 2 1 2 1 RN107 RN122 2 1 2 1 RN119 M_A10 M_A7 M_A9 M_A12 RN123 2 1 2 1 RN121 M_DATA65 M_DATA64 M_DATA67 M_DATA66 RN117 2 1 2 1 RN120 M_DATA69 M_DATA68 M_DATA70 M_DM8 RN116 2 1 2 1 RN118 SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J M_DATA_R_69 M_DATA_R_68 M_DATA_R_70 M_DM_R_8 M_DATA_R_65 M_DATA_R_64 M_DATA_R_67 M_DATA_R_66 7,12 M_BS1# M_A_FR_10 M_A_FR_7 M_A_FR_9 M_A_FR_12 M_DATA_R_8 M_DATA_R_3 M_DQS_R1 M_DATA_R_9 M_DATA_R_50 M_DQS_R6 M_DATA_R_56 M_DATA_R_51

PARALLEL TERMINATION
PULL HIGH STUBS < 0.8", Command <0.25",PLACE RPs CLOSE TO DM1 NO EQUAL LENGTH LIMITATION
M_A7 M_A5 M_A1 M_A4 M_BS1# M_RAS# +1.25VRUN RN75 SRN56-2-U2 1 4 M_A10 2 3 M_BS0# RN76 SRN56-2-U2 1 4 M_WE# 2 3 RN34 SRN56-2-U2 1 4 2 3 RN33 SRN56-2-U2 1 4 2 3 M_DATA_R_71 RN40 SRN56-2-U2 1 4 2 3 RN38 SRN56-2-U2 1 4 2 3 M_CAS# RN69 SRN56-2-U2 1 4 M_DATA_R_67 2 3 RN70 SRN56-2-U2 1 4 M_A12 2 3 M_A9 RN74 SRN56-2-U2 1 4 2 3 M_A2 RN73 SRN56-2-U2 1 4 2 3 RN83 SRN56-2-U2 1 4 M_DQS_R6 2 3 M_DATA_R_50 RN84 SRN56-2-U2 1 4 M_DATA_R_51 2 3 M_DATA_R_56 RN85 SRN56-2-U2 1 4 M_DATA_R_57 2 3 M_DQS_R7 RN86 SRN56-2-U2 1 4 M_DATA_R_58 2 3 M_DATA_R_59 RN63 SRN56-2-U2 1 4 M_DQS_R2 2 3 M_DATA_R_18 RN64 SRN56-2-U2 1 4 M_DATA_R_19 2 3 M_DATA_R_24 RN65 SRN56-2-U2 1 4 M_DATA_R_25 2 3 M_DQS_R3 RN66 SRN56-2-U2 1 4 M_DATA_R_26 2 3 M_DATA_R_27 RN28 SRN56-2-U2 1 4 M_DATA_R_28 2 3 M_DATA_R_23 RN26 SRN56-2-U2 1 4 M_DATA_R_21 2 3 M_DATA_R_20 RN30 SRN56-2-U2 1 4 M_DATA_R_31 2 3 M_DATA_R_30 RN29 SRN56-2-U2 1 4 M_DM_R_3 2 3 M_DATA_R_29 RN50 SRN56-2-U2 1 4 M_DATA_R_63 2 3 M_DATA_R_62 RN49 SRN56-2-U2 1 4 M_DM_R_7 2 3 M_DATA_R_61 RN48 SRN56-2-U2 1 4 M_DATA_R_60 2 3 M_DATA_R_55 RN46 SRN56-2-U2 1 4 M_DATA_R_53 2 3 M_DATA_R_52 RN72 SRN56-2-U2 1 4 2 3 RN71 SRN56-2-U2 1 4 2 3 RN39 SRN56-2-U2 1 4 2 3 RN37 SRN56-2-U2 1 4 2 3 M_A0 M_A11 M_A8 M_A6 7,12 M_AB4 RN35 SRN56-2-U2 1 4 2 3 RN36 SRN56-2-U2 1 4 2 3

M_CS2_R# 7,12 M_CKE2_R# 7,12 M_CKE0_R# 7,12 M_CKE1_R# 7,12

M_DATA1 M_DATA0 M_DATA2 M_DQS0

M_DATA_R_1 M_DATA_R_0 M_DATA_R_2 M_DQS_R0

M_DATA59 M_DATA58 M_DQS7 M_DATA57

M_DATA_R_59 M_DATA_R_58 M_DQS_R7 M_DATA_R_57

M_DATA44 M_DATA39 M_DATA37 M_DATA36

M_DATA_R_44 M_DATA_R_39 M_DATA_R_37 M_DATA_R_36

M_DATA28 M_DATA23 M_DATA21 M_DATA20

M_DATA_R_28 M_DATA_R_23 M_DATA_R_21 M_DATA_R_20

RN57 SRN56-2-U2 1 4 M_DATA_R_1 2 3 M_DATA_R_0 RN60 SRN56-2-U2 M_DQS_R1 1 4 2 3 M_DATA_R_9 RN59 SRN56-2-U2 M_DATA_R_8 1 4 M_DATA_R_3 2 3 RN24 SRN56-2-U2 1 4 M_DATA_R_13 M_DM_R_1 2 3 RN25 SRN56-2-U2 1 4 M_DATA_R_14 2 3 M_DATA_R_15 RN78 SRN56-2-U2 1 4 M_DATA_R_34 2 3 M_DQS_R4 RN77 SRN56-2-U2 M_DATA_R_33 1 4 2 3 M_DATA_R_32 RN80 SRN56-2-U2 M_DQS_R5 1 4 M_DATA_R_41 2 3 RN79 SRN56-2-U2 1 4 M_DATA_R_40 M_DATA_R_35 2 3 RN41 SRN56-2-U2 1 4 M_DATA_R_36 2 3 M_DATA_R_37 RN43 SRN56-2-U2 1 4 M_DATA_R_39 2 3 M_DATA_R_44 RN42 SRN56-2-U2 M_DM_R_4 1 4 2 3 M_DATA_R_38 RN45 SRN56-2-U2 M_DATA_R_46 1 4 M_DATA_R_47 2 3

7,12 M_AB2

M_CS0_R# 7,12 M_CS3_R# 7,12 M_CS1_R# 7,12

M_DATA47 M_DATA46 M_DATA38 M_DM4

M_DATA_R_47 M_DATA_R_46 M_DATA_R_38 M_DM_R_4

M_DATA31 M_DATA30 M_DM3 M_DATA29

M_DATA_R_31 M_DATA_R_30 M_DM_R_3 M_DATA_R_29

RN62 SRN56-2-U2 1 4 M_DATA_R_17 M_DATA_R_16 2 3 RN61 SRN56-2-U2 1 4 M_DATA_R_11 2 3 M_DATA_R_10 RN82 SRN56-2-U2 1 4 M_DATA_R_49 2 3 M_DATA_R_48 RN81 SRN56-2-U2 M_DATA_R_43 1 4 2 3 M_DATA_R_42 RN68 SRN56-2-U2 M_DATA_R_66 1 4 M_DQS_R8 2 3 RN67 SRN56-2-U2 1 4 M_DATA_R_65 M_DATA_R_64 2 3 RN31 SRN56-2-U2 1 4 M_DATA_R_68 2 3 M_DATA_R_69 RN32 SRN56-2-U2 1 4 M_DM_R_8 2 3 M_DATA_R_70

M_CKE3_R# 7,12

M_DATA40 M_DATA35 M_DQS5 M_DATA41

M_DATA_R_40 M_DATA_R_35 M_DQS_R5 M_DATA_R_41

M_DATA18 M_DQS2 M_DATA24 M_DATA19

M_DATA_R_18 M_DQS_R2 M_DATA_R_24 M_DATA_R_19

M_AB1 7,12

M_DATA43 M_DATA42 M_DATA49 M_DATA48

M_DATA_R_43 M_DATA_R_42 M_DATA_R_49 M_DATA_R_48

M_DATA27 M_DATA26 M_DQS3 M_DATA25

M_DATA_R_27 M_DATA_R_26 M_DQS_R3 M_DATA_R_25

M_A3

M_AB5 7,12

M_DATA15 M_DATA14 M_DM1 M_DATA13

M_DATA_R_15 M_DATA_R_14 M_DM_R_1 M_DATA_R_13

M_DATA53 M_DATA52 M_DATA60 M_DATA55

M_DATA_R_53 M_DATA_R_52 M_DATA_R_60 M_DATA_R_55

RN23 SRN56-2-U2 1 4 M_DATA_R_12 2 3 M_DATA_R_7 RN27 SRN56-2-U2 1 4 M_DATA_R_22 2 3 M_DM_R_2 RN44 SRN56-2-U2 1 4 M_DM_R_5 2 3 M_DATA_R_45 RN47 SRN56-2-U2 1 4 M_DATA_R_54 2 3 M_DM_R_6

M_DATA6 M_DM0 M_DATA5 M_DATA4

M_DATA_R_6 M_DM_R_0 M_DATA_R_5 M_DATA_R_4

M_DM7 M_DATA61 M_DATA63 M_DATA62

M_DM_R_7 M_DATA_R_61 M_DATA_R_63 M_DATA_R_62

M_DATA11 M_DATA10 M_DATA17 M_DATA16

M_DATA_R_11 M_DATA_R_10 M_DATA_R_17 M_DATA_R_16

M_DATA33 M_DATA32 M_DATA34 M_DQS4

M_DATA_R_33 M_DATA_R_32 M_DATA_R_34 M_DQS_R4

M_A11 M_A6 M_A8 M_DATA71

M_BS1#

Control signals use Topology 2
M_A[12..0] 7,12 M_A_FR_[12..0] 12 M_DATA[71..0] 7 M_DATA_R_[71..0] 12 M_DQS[8..0] 7 M_DQS_R[8..0] 12 M_DM[8..0] 7 M_DM_R_[8..0] 12

7,12 M_WE#

RN125 2 1

SRN10J 3 4

M_WE_FR# 12

7,12 M_RAS# 7,12 M_CAS#

M_A_FR_3 M_A_FR_0

RN126 2 1

2 1

SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J SRN10J 3 4 3 4 SRN10J

M_A3 M_A0

M_RAS_FR# 12 M_CAS_FR# 12

RN124 RN101 M_DATA12 2 1 M_DATA7 M_DATA22 2 1 M_DM2 RN108 RN134 2 M_DM5 M_DATA45 1 M_DATA54 2 1 M_DM6 RN140

M_DATA_R_12 M_DATA_R_7 M_DATA_R_22 M_DM_R_2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

M_DM_R_5 M_DATA_R_45 M_DATA_R_54 M_DM_R_6

DDR Serial/Terminator Resistor
Size A3 Document Number

PEBBLE--02203
Sheet 13 of

Rev SD 40

Date: Thursday, March 13, 2003

+1.25VRUN

PLACE ONE 0.1 and ONE 0.01 CAP CLOSE TO EVERY 4 PULL-UP TERMINATION RESISTORS, CRB-P13 DATA(64)+ADD(13)+DQS(9)+CB(8)+CMD(13)=107 0.1UF 0402 X7R 59X

BC227 SCD01U16V2KX

BC229 SCD01U16V2KX

BC231 SCD01U16V2KX

BC233 SCD01U16V2KX

BC235 SCD01U16V2KX

BC237 SCD01U16V2KX

BC239 SCD01U16V2KX

BC241 SCD01U16V2KX

BC243 SCD01U16V2KX

BC245 SCD01U16V2KX

BC247 SCD01U16V2KX

BC249 SCD01U16V2KX

BC251 SCD01U16V2KX

BC299 SCD01U16V2KX

BC301 SCD01U16V2KX

BC303 SCD01U16V2KX

BC305 SCD01U16V2KX

BC307 SCD01U16V2KX

BC309 SCD01U16V2KX

BC311 SCD01U16V2KX

BC313 SCD01U16V2KX

BC315 SCD01U16V2KX

BC317 SCD01U16V2KX

BC319 SCD01U16V2KX

1

1

1

1

2

2

2

2

1

1

1

1

1

1

1

1

1

1

1

2

BC321 SCD01U16V2KX

BC323 SCD01U16V2KX

BC325 SCD01U16V2KX

BC327 SCD01U16V2KX

BC329 SCD01U16V2KX

BC331 SCD01U16V2KX

BC226 SCD1U10V2MX-1

BC228 SCD1U10V2MX-1

BC230 SCD1U10V2MX-1

BC232 SCD1U10V2MX-1

1 BC234 SCD1U10V2MX-1

2

2

2

2

2

2

2

2

2

2

2

1

1

1

1

1

1

1

1

1

1

1

2

2

2

2

2

2

2

2

2

2

2

+2.5VSUS

PLACE CAPS BETWEEN AND NEAR DDR SKTS PLACE EACH 0.1UF CAP CLOSE TO POWER PIN

1

1

1

1

2

BC308 SCD1U10V2MX-1

BC310 SCD1U10V2MX-1

BC312 SCD1U10V2MX-1

BC314 SCD1U10V2MX-1

BC316 SCD1U10V2MX-1

BC318 SCD1U10V2MX-1

BC320 SCD1U10V2MX-1

BC322 SCD1U10V2MX-1

BC324 SCD1U10V2MX-1

BC326 SCD1U10V2MX-1

BC328 SCD1U10V2MX-1

1 BC330 SCD1U10V2MX-1

2

BC236 SCD1U10V2MX-1

BC238 SCD1U10V2MX-1

BC240 SCD1U10V2MX-1

BC242 SCD1U10V2MX-1

BC244 SCD1U10V2MX-1

BC246 SCD1U10V2MX-1

BC248 SCD1U10V2MX-1

BC250 SCD1U10V2MX-1

BC300 SCD1U10V2MX-1

BC302 SCD1U10V2MX-1

BC304 SCD1U10V2MX-1

1 BC306 SCD1U10V2MX-1

1

1

1

2

2

2

2

2

2

2

1

1

1

1

1

1

1

2

2

2

2

2

2

2

1

1

1

1

1

1

1

2

2

2

2

2

2

2

S.C.
1 1 1 1 1

1

1

1

1

1

1

2

2

2

2

2

2

2

2

2

2

2

1

1

1

2

C313 SCD1U10V2MX-1

C314 SCD1U10V2MX-1

C318 SCD1U10V2MX-1

C319 SCD1U10V2MX-1

C321 SCD1U10V2MX-1

C254 SCD1U10V2MX-1

C255 SCD1U10V2MX-1

C256 SCD1U10V2MX-1

C257 SCD1U10V2MX-1

C258 SCD1U10V2MX-1

C259 SCD1U10V2MX-1

1

C286 SCD1U10V2MX-1

S.B

2

2

S.C.

2

BC213 SC10U10V-U1

TC10 ST150U6D3V-1-U

TC45 ST150U6D3V-1-U Title

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

DDR Decoupling CPA
Size A3 Document Number

2

BC284 SCD1U10V2MX-1

C242 SCD1U10V2MX-1

C243 SCD1U10V2MX-1

C244 SCD1U10V2MX-1

C245 SCD1U10V2MX-1

C246 SCD1U10V2MX-1

C247 SCD1U10V2MX-1

1 C248 SCD1U10V2MX-1

2

BC276 SCD1U10V2MX-1

BC277 SCD1U10V2MX-1

BC278 SCD1U10V2MX-1

BC279 SCD1U10V2MX-1

BC280 SCD1U10V2MX-1

BC281 SCD1U10V2MX-1

BC282 SCD1U10V2MX-1

1 BC283 SCD1U10V2MX-1

2

BC495 SCD1U10V2MX-1

BC496 SCD1U10V2MX-1

BC497 SCD1U10V2MX-1

BC498 SCD1U10V2MX-1

BC499 SCD1U10V2MX-1

BC500 SCD1U10V2MX-1

BC501 SCD1U10V2MX-1

1 BC502 SCD1U10V2MX-1

PEBBLE--02203
Sheet 14 of

Rev SD 40

Date: Thursday, March 13, 2003

+3VSUS 2 1 RN93

*SE
3 4 USB_OC#4 USB_OC#5 TP80 TP79 31 USBP1P 31 USBP1N TP82 TP81 22 USBP3P 22 USBP3N 22 USBP4P 22 USBP4N 22 USBP5P 22 USBP5N USBP0P USBP0N USBP2P USBP2N C20 D20 A21 B21 C18 D18 A19 B19 C16 D16 A17 B17 B15 C14 A15 B14 A14 D14 J20 G22 F20 G20 F21 H20 F23 H22 G23 H21 F22 E23 F19 B23 A23 1 R136 22D6R3F 2

U23A USBP0P USBP0N USBP1P USBP1N USBP2P USBP2N USBP3P USBP3N USBP4P USBP4N USBP5P USBP5N OC0# OC1# OC2# OC3# OC4# OC5# GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43 CLK48 USBRBIAS# USBRBIAS HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9 HI10 HI11 HI_STB/HI_STBS HI_STB#/HI_STBF HICOMP HI_VSWING HIREF CLK66 LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 LAN_RSTSYNC LAN_CLK EE_DIN EE_CS EE_SHCLK EE_DOUT AC_SYNC AC_SDOUT AC_BIT_CLK AC_RST# AC_SDIN0 AC_SDIN1 AC_SDIN2 L19 L20 M19 M21 P19 R19 T20 R20 P23 L22 N22 K21 P21 N20 R23 R22 M23 T21 A10 A9 A11 B10 C10 A12 B11 C11 D11 D10 C12 A8 C9 ICH_AC_SYNC D9 ICH_AC_DOUT B8 C13 AC_RST# D13 A13 B13 ICH_AC_DIN2 ICH3 NO AC_SDIN2 HL_0 HL_1 HL_2 HL_3 HL_4 HL_5 HL_6 HL_7 HL_8 HL_9 HL_10 HL_11

HL_[10..0] 7

SRN10KJ 2 1 RN94 3 4 USB_OC#3 USB_OC#2

HUB INTERFACE LAYOUT Route signals with 20 mil space routing. to others group traces Signals must match +/- 0.1" of HUB_STB/STB# signals.
Banias/Montara-GM Checklist Ver.0.7 P.34 48.7 ohm 1% pull up to +1.5VRUN +1.5VRUN Banias/Odem RDDP P.120 When board impedance is 55 +/-15% Ohm 36.5 ohm to GND

Banias/Montara-GM Checklist Ver.0.89 P.35

+1.5VRUN 1 R495 226R3F 2 HUB_VSWING R201 147R3F BC458 SCD01U50V3KX HUB_VREF R167 113R3F BC457 SCD1U16V3KX 2 1

SRN10KJ 2 1 RN95 3 4 USB_OC#1 USB_OC#0

TP27 1 HL_STB 7 HL_STB# 7

R200

SRN10KJ

USB_OC#0 USB_OC#1 USB_OC#2 22 USB_OC#3 22 USB_OC#4 11 LAMP_STAT TP25 USB_OC#4 USB_OC#5

2

48D7R3F

HUB_VSWING HUB_VREF

CLOSE TO PIN with in 0.5" 10 mil trace,20 mil space
CLK66_ICH 3

Close to pin

1

R139 56R3

2

HL_11

H/W Strapping
R439 ICH_AC_DOUT 1 2 DUMMY-1KR3

R101 1 1KR3 2

Stuff for Safe Mode
+3VRUN

3 CLK48_ICH 1

CLK48_ICH

TP75 TP73 TP78

BC455 SC10P

Proto-1B
R436 R435 R434 R432 R442 1 1 1 1 1 2 2 2 2 2 33R3 33R3 33R3 33R3 33R3 MDC_SYNC 19 CODEC_SYNC 24 CODEC_SDOUT 24 MDC_SDOUT 19 ICH_AC_RST# 19,24

R478 33R3

*SE
1 1 1 R169 DUMMY-R3 2 R170 10KR3 R168 DUMMY-R3 1 R171 DUMMY-R3 2 BC453 SC10P

ICH_AC_BITCLK 24 ICH_AC_DIN0 ICH_AC_DIN1 TP23 24 19

ICH4-M-U PIDE_D[0..15] 19 PIDE_A[0..2] 19

2

2

2

BID0 BID1 BID2 BID3 R172 10KR3

1

1

1

1

U23E PIDE_D15 PIDE_D14 PIDE_D13 PIDE_D12 PIDE_D11 PIDE_D10 PIDE_D9 PIDE_D8 PIDE_D7 PIDE_D6 PIDE_D5 PIDE_D4 PIDE_D3 PIDE_D2 PIDE_D1 PIDE_D0 Y11 W11 W10 AB10 W9 AC9 Y9 AB9 AA8 Y8 AB8 AA7 AA10 Y10 AC11 AB11 W12 Y12 AA11 AC12 AB12 PIDE_A0 PIDE_A1 PIDE_A2 AA13 AB13 W13 Y13 AB14 Y17 AA17 Y16 AB16 Y15 AA15 AC15 Y14 AA14 W14 AB15 W15 AC16 W16 AB17 W17 AA18 AB19 AB18 Y18 AC19 AA20 AC20 AC21 AB21 AC22 AC13 AA19 IRQ15 SIDE_D15 SIDE_D14 SIDE_D13 SIDE_D12 SIDE_D11 SIDE_D10 SIDE_D9 SIDE_D8 SIDE_D7 SIDE_D6 SIDE_D5 SIDE_D4 SIDE_D3 SIDE_D2 SIDE_D1 SIDE_D0 TP98 TP49 TP95 TP45 TP96 TP42 TP43 TP91 TP92 TP93 TP44 TP94 TP47 TP97 TP46 TP99 TP101 TP50 TP48 TP100

ICH4 Integrated Pull-up and Pull-down Resistors
ICH4 EDS 10429 4.2
SDD15 SDD14 SDD13 SDD12 SDD11 SDD10 SDD9 SDD8 SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0 SDIOW# SDDACK# SDDREQ SDIOR# SIORDY SDA0 SDA1 SDA2 SDCS1# SDCS3# IRQ14 IRQ15

R173 10KR3 2

R174 DUMMY-R3 2

R175 10KR3 2

BID3 BID2 BID1 BID0 Board Rev. -----------------------------------------------

0 0 0 0 0 0

0 0 0 0 1 1

0 0 1 1 0 0

0 1 0 1 0 1

NFF X00 X01 X02 X03 ???

+3VRUN 2

R253 4K7R3 19 PIDE_IOW# 19 PIDE_DACK# 19 PIDE_DREQ 19 PIDE_IOR# 1

PDD15 PDD14 PDD13 PDD12 PDD11 PDD10 PDD9 PDD8 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 PDIOW# PDDACK# PDDREQ PDIOR# PIORDY PDA0 PDA1 PDA2 PDCS1# PDCS3#

EE_DIN,

EE_DOUT,

PME#, PWRBTN# ICH4 internal 20K pull-ups

GNT[B:A]#/GNT[5]#/GPIO[17:16], LAD[3:0]#/FWH[3:0]#, LAN_RXD[2:0] AC_BITCLK, AC_RST#, AC_SDIN[2:0],
+3VRUN 2

2

LDRQ[1:0], ICH4 internal 10K pull-ups ICH4 internal 20K pull-downs

AC_SDOUT, AC_SYNC, DPRSLPVR, SPKR USB[5:0][P,N] PDD[7]/SDD[7], PDDREQ / SDDREQ ICH4 internal 15K pull-downs ICH4 internal 11.5K pull-downs ICH4 internal 100K pull-downs

R538 4K7R3 1

19 PIDE_IORDY

TP51

LANCLK

AC97 AC terminations
ICH_AC_BITCLK ICH_AC_DIN0 ICH_AC_DIN1 1 1 1 19 PIDE_CS1# 19 PIDE_CS3#

TP54 TP53 TP52 TP55 TP56 IRQ14 19 TP102

ICH4 IDE Integrated Series Termination Resistors
PDD[15:0],SDD[15:0],PDIOW#,SDIOW#, PDIOR#,PDIOW#,PDREQ,SDREQ, PDDACK#, SDDACK#, PIORDY,SIORDY, SDA[2:0], PDCS1#,SDCS1#, PDA[2:0], PDCS3#,SDCS3#,IRQ14,IRQ15, approximately 33 ohm

R103 DUMMY-R3 1 2 1 2

R102 DUMMY-R3 1 2

R441 DUMMY-R3

ICH4-M-U

BC79 DUMMY-C3 2 2

BC78 DUMMY-C3 2

BC401 DUMMY-C3

+3VRUN 2 1 RN11 3 4 IRQ14 IRQ15 Title

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

SRN8K2J

ICH4-M (1 of 3)
Size A3 Document Number

2

+3VRUN

TP26 TP28 TP29 TP32 TP30 TP31

BID0 BID1 BID2 BID3

TP20 TP19 TP21 TP74 TP72 TP22 TP77 TP76

1 R494 10R3

Proto-1B NS
2

BC122 SCD1U16V3KX

1

BC121 SCD01U50V3KX

Close to pin

PEBBLE--02203
Sheet 15 of

Rev SE 40

Date: Thursday, March 13, 2003

PCI/Interrupt I/F Pullups
+3VRUN P_REQ#0 P_TRDY# P_FRAME# P_SERR# +3VRUN 1 2 3 4 5 RP2 10 9 8 7 6 P_PLOCK# P_DEVSEL# P_PERR# P_IRDY# +3VRUN 10 9 8 7 6 U23D PIRQA# 23,26 PIRQB# 18,20 PIRQC# 20,23 PIRQD# D5 C2 B4 A3 C8 D7 C3 C4 B6 C7 B3 A2 B1 A6 B5 D6 B7 A7 E6 C1 C5 E8 F1 L5 F2 M3 F3 G1 L4 M2 K5 W2 U5 P5 PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5 REQ4# REQ3# REQ2# REQ1# REQ0# REQB#/REQ5#/GPIO1 REQA#/GPIO0 GNT4# GNT3# GNT2# GNT1# GNT0# GNTB#/GNT5#/GPIO17 GNTA#/GPIO16 FRAME# IRDY# TRDY# DEVSEL# STOP# PAR PERR# PLOCK# SERR# PME# PCIRST# PCICLK ICH4-M-U

P_AD[31..0] 18,20,23,26 P_C/BE#[3..0] 18,20,23,26

RTC Circuitry
VCC_RTC +3VALW 1 +3.3VRTC

SRP8K2-1 P_STOP# P_REQ#2 +3VRUN 1 2 3 4 5 RP3

PIRQB# PIRQA# P_REQ#1 GPIO7

SRP8K2-1

REQ4:Broadcom LAN 18 REQ3:Mini PCI 23 REQ2:USB 2.0(No on Pebble) REQ1:Card Bus 20 REQ0:Docking 27 REQB:PCI4515 ??? 20

P_REQ#4 P_REQ#3 P_REQ#1 P_REQ#0 P_REQB#

P_REQ#2 P_REQB# P_REQA#

LAYOUT: MAKE PAD ACCESSABLE
RTCRST#

BC481 SC1U10V5KX D53 2

1

R537 180KR3

2

1

+3VRUN

P_GNTB# P_GNTA#

1

SERIRQ PCIRST# PIRQD# PIRQC#

1 2 3 4 5

RP1

10 9 8 7 6

P_REQ#3 P_REQB# P_REQ#4 P_REQA#

18 P_GNT#4 23 P_GNT#3 TP18 20 P_GNT#1 26 P_GNT#0 20 P_GNTB# 18,20,23,26 P_FRAME# 18,20,23,26 P_IRDY# 18,20,23,26 P_TRDY# 18,20,23,26 P_DEVSEL# 18,20,23,26 P_STOP# 18,20,23,26 P_PAR 18,20,23,26 P_PERR# 26 P_PLOCK# 18,20,23,26 P_SERR# 28 ICH_PME# 7,10,18,20,23,26,29 PCIRST# 3 CLKPCIF_ICH 1 R493 10R3 2

2

+3VRUN

RB751V-40-U

S.C.

GP8 GAP-OPEN RTCRST# BC480 SCD1U16V3KX

P_GNT#2

RTCRST# delay 18~25ms

2 BC181 SCD047U25V3KX BC179 SC3P50V3CN 3 X5 XTAL-32D768K-4P 82.30001.031 2 BC180 SC3P50V3CN 2 PM_SLP_S1# +3VSUS 5

ICH_GPIO2 ICH_GPIO3 ICH_GPIO4 ICH_GPIO5

SRP8K2-1 +3VRUN RN92 2 1 RN91 2 1 SRN8K2J 3 4 SRN8K2J 3 4 ICH_GPIO2 ICH_GPIO3 ICH_GPIO4 ICH_GPIO5

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 C/BE3# C/BE2# C/BE1# C/BE0#

P4 D2 R1 D3 P2 E1 P1 E2 M5 E4 N3 E3 N2 E5 N1 F4 F5 L3 H2 L2 G4 L1 G2 K2 J5 H4 J4 G5 K1 H3 J3 H5 N4 M4 K4 J2

P_AD31 P_AD30 P_AD29 P_AD28 P_AD27 P_AD26 P_AD25 P_AD24 P_AD23 P_AD22 P_AD21 P_AD20 P_AD19 P_AD18 P_AD17 P_AD16 P_AD15 P_AD14 P_AD13 P_AD12 P_AD11 P_AD10 P_AD9 P_AD8 P_AD7 P_AD6 P_AD5 P_AD4 P_AD3 P_AD2 P_AD1 P_AD0 P_C/BE#3 P_C/BE#2 P_C/BE#1 P_C/BE#0

D54 RB751V-40-U

S.C.

1 R536 1KR3

ICH_VBIAS ICH_VBIAS 1 R252 10MR3 RTCX1 RTCX2 1 4 2

+3VRUN 1 R197 8K2R3 R250 1 2 10KR3 R196 2 10KR3 2 THRM#

CLKPCIF_ICH

R251 10MR3 2 1

P_CLKRUN#

1

AGPBUSY#

BC443 SC10P

BIOS NOTE: BIOS should disable PM_STPCPU# on CK_Titan. (Use H_DPSLP# instead)
R497 10KR3 1 2 1 R496 2 10KR3 U23B J19 H19 K20 V23 AB23 U21 Y23 AB22 V21 W23 W21 Y22 U22 AA21 V22 J22 T5 U3 U4 LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 T2 R4 T4 U2 AA4 RTCRST# W6 W7 AB6 AA6 AB5 Y6 AC7 AC6 APICCLK APICD0 APICD1 STPCLK# A20M# CPUSLP# CPUPWRGD INTR NMI SMI# IGNEE# A20GATE RCIN# FERR# INIT# SERIRQ LFRAME#/FWH4 LDRQ0# LDRQ1# LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 SUSCLK INTRUDER# RTCRST# PWROK RSMRST# VCCRTC VBIAS RTCX1 RTCX2 DPRSLPVR DPSLP# ICH4-M-U AGPBUSY#/GPIO6 GPIO7 GPIO8 GPIO12 GPIO13 STP_PCI#/GPIO18 SLP_S1#/GPIO19 STP_CPU#/GPIO20 C3_STAT#/GPIO21 CPUPERF#/GPIO22 SSMUXSEL/GPIO23 CLKRUN#/GPIO24 GPIO25 GPIO27 GPIO28 SLP_S3# SLP_S4# SLP_S5# RI# PWRBTN# SYS_RESET# LAN_RST# BATLOW#/TP0 SUS_STAT#/LPCPD# VGATE/VRMPWRGD THRMTRIP# THRM# SMLINK0 SMLINK1 SMBDATA SMBCLK SMBALERT#/GPIO11 SPKR CLK14 R2 R3 V4 V5 W3 Y21 W18 W19 T3 Y20 J21 AC2 V2 W1 W4 Y4 Y2 AA2 Y1 AA1 Y3 Y5 AB2 AB3 V19 W20 V1 AC3 AB1 AB4 AC4 AA5 H23 J23 CLK14_ICH 1 PM_SLP_S1#_G PM_C3_STAT# PM_CPUPERF# ICH_GMUXSEL# P_CLKRUN# BT_ENABLE MPCIACT# GPIO7 AGPBUSY# 7 EXT_SMI# 28 EXT_WAK# 28 EXT_SCI# 28 PM_STPPCI# 3 PM_STPCPU# 3,36 TP86 TP103 TP88 P_CLKRUN# 18,20,23,29 TP141 S.B. TP142 TP90 PM_SLP_S3# 28 TP40 PM_SLP_S5# 28 PWRBTN# 28 TP39

* S.C.

1

R535 100KR3

2 DELAY_IMVP_PWRGD 4 CC_CPUSLP# 2 SUSPWROK

TP104

4 CC_STPCLK# 4 CC_A20M# 4 CC_CPUPWRGD VCC_IO 4 CC_INTR 4 CC_NMI 4 CC_SMI# R255 4 CC_IGNNE# 28 GATEA20 56R3 R254 28 RCIN# 2 1 1 2 56R3 4 CC_INIT#

1

R532 100KR3

1

R539 0R3-U U75 A B GND NC7SZ08

2

PM_SLP_S1# 3

PM_SLP_S1#_G PM_SLP_S3#

1 2 3

VCC

NS
BC483 SCD1U16V3KX

LPC_LDRQ1# +3VSUS RN4 2 1 TP89 SRN10KJ 3 4 SYS_RESET# BATLOW#

4 CC_FERR#

Y

4

20,29 SERIRQ 29 LPC_LFRAME# 29 LPC_LDRQ0# 29 LPC_LDRQ1#

PM_SLP_S4# ICH_RI# SYS_RESET# LAN_RST# BATLOW# PM_SUS_STAT# THRMTRIP#

VCC_RTC 1

* S.D.
1 1

R533 2 DUMMY-R3 R534 10KR3 2 SUSPWROK If ICH-4 LAN not used,10K ohm PD or connect directly to VCC_IO ----RSMRST#(SUSPWROK) But in Bon conncet to PWROK(DELAY_IMVP_PWRGD) 2

+3VSUS

29 LPC_LAD[3..0] R514 100KR3 8 PM_SUS_CLK

TP41 VCORE_PWRGD_D 34 THRM# 28 S.B.

+3VSUS R198 1 2 ICH_PME# DUMMY-R3 TP70 TP24 TP71 TP69 P_GNT#4 P_GNT#0 P_GNTA# P_GNTB#

2

1 2 RN3 SRN10KJ 1 2 3 U22 A B GND VCC Y 4 3

34 INTRUDER# 7,34 DELAY_IMVP_PWRGD 34 SUSPWROK VCC_RTC

ICH_VBIAS RTCX1 RTCX2 2 0R3-U

SMBD_ICH SMBC_ICH SMB_ALERT#

SMBD_ICH 3,12,18,23 SMBC_ICH 3,12,18,23 R516 ICH_SPKR 25 CLK14_ICH 3 1 56R3 2

R515 56R3 1

PM_THERMTRIP# 4 28,31 COM_RI0# 20 CBS_RI#

36 DPRSLPVR 4,7 CC_DPSLP#

1 R176

V20 CC_DPLSP# U23

5 4 ICH_RI#

Should go high no sooner than 10mS after both +3VRUN and +1.8VRUN have reach their nominal voltage Should go high no sooner than 10mS after both +3VSUS and +1.8VSUS have reach their nominal voltage

CLK termination close to ICH4
2

R138 33R3 SMBD_ICH SMBC_ICH SMB_ALERT# RN10 2 1 1 R531 10KR3

+3VSUS SRN4D7KJ 3 4 2

NO STUFF

NC7SZ86

H/W Strapping
R477 P_GNTA# 1 2 DUMMY-1KR3

BC99 SC10P

Wistron Corporation
+3VRUN Title 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

H/W Strapping
Stuff for A16 Swap Override
R137 ICH_SPKR 1 2 DUMMY-1KR3

ICH4-M (2 of 3)
Size Document Number Custom

Stuff for No Reboot

PEBBLE--02203
Sheet 16 of

Rev SD 40

Date: Thursday, March 13, 2003

Near Balls 3.3VRUN 1.5VRUN 3.3VSUS 1.5VSUS 1.8VRUN VCC_IO 3.3VLAN 1.5VLAN VCCPLL VCC5REF VCC5REFSUS VCCRTC Intel ERB Ver.0.5 p17 22uF*2,0.1uF*9 100uF*1,22uF*1,0.1uF*4 22uF*1,0.1uF*4 10uF*1,0.1uF*3 22uF*1,0.1uF*2 1uF*1,0.1uF*2 22uF*1,4.7uF*1,0.1uF*2 22uF*1,0.1uF*2 0.1uF*1,0.01uF*1 0.1uF*6 0.1uF*2 0.1uF*2 0.1uF*2 0.1uF*2 0.1uF*1 0.1uF*2 0.1uF*2 0.1uF*1 0.1uF*1 0.1uF*1 0.1uF*1 A1,A4,H1,T1,AC10,AC18 K23,C23
1

+3VRUN 1 U23C A5 B2 H6 J1 K6 M10 P6 U1 P12 V10 V16 V18 AC8 AC17 H18 J18 E9 F9 E11 F10 V9 V8 V7 F15 F16 F17 F18 K14 K10 K12 K18 K22 P10 T18 V14 U19 L23 M14 P18 T22 F6 F7 E12 R6 T6 U6 G18 E13 F14 E20 E7 V6 E15 P14 U18 AA23 1 BC427 SCD1U16V3KX BC431 SC10U10V-U1 C22 D1 C23 C21 C19 C17 C15 C6 D22 B20 B18 B16 B12 B9 A22 A20 A18 A16 A4 A1 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCCLAN3_3/VCCSUS3_3 VCCLAN3_3/VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCCHI VCCHI VCCHI VCCHI VCCLAN1_5/VCCSUS1_5 VCCLAN1_5/VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 V5REF V5REF V5REF_SUS V_CPU_IO V_CPU_IO V_CPU_IO VCCPLL VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS ICH4-M-U VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS B22 AC23 AC18 AC14 AC10 AC5 AC1 AB20 AB7 AA22 AA16 AA12 AA9 AA3 Y19 Y7 W22 W8 W5 M20 V17 V15 V3 T23 P20 T19 T1 R21 R18 R5 P22 P13 P11 P3 N23 N21 N19 N14 N13 N12 N11 N10 N5 M13 M12 M11 M1 M22 L21 L14 L13 L12 L11 L10 K23 U20 K19 K13 K11 K3 J6 H1 G21 G19 G6 G3 F8 E22 E21 E19 E18 E17 E16 E14 E10 D23 D21 D19 D17 D15 D12 D8 D4

A22,AC5 A16,AC1 T23,N23 AA23 E9,F9 F6,F7 C22 E7 A16 AB5

2

S.C.

2

BC470 SCD1U16V3KX

BC469 SCD1U16V3KX

BC445 SCD1U16V3KX

BC482 SCD1U16V3KX

BC479 SC10U10V-U1

BC423 SC10U10V-U1

S.C.

BC444 SCD1U16V3KX

BC451 SCD1U16V3KX

BC400 SCD1U16V3KX +3VSUS

Intel MGM Checklist Ver.0.7 p41

C226 SC4D7U10V-U

BC468 SCD1U16V3KX

BC467 SCD1U16V3KX +3VSUS

2 +1.5VRUN 1 TC36 ST100U6D3V-U +1.5VRUN 2 1 2

BC428 SCD1U16V3KX

BC425 SCD1U16V3KX

BC449 SCD1U16V3KX

1 BC402 SC10U10V-U1

S.C.

1

2

2

BC452 SCD1U16V3KX

BC450 SCD1U16V3KX

C227 SCD1U10V2MX-1

1 BC459 SC10U10V-U1

S.C.

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail
+1.5VSUS +3VRUN 1 +5VRUN 1

BC448 SCD1U16V3KX

BC456 SCD1U16V3KX

BC454 SC10U10V-U1

S.C.

2

D51 RB751V-40-U

R492 1KR3 2

BC446 SCD1U16V3KX

BC424 SCD1U16V3KX

1 C187 SC10U10V-U1

S.C.

S.C.

2

V5REF_RUN BC442 SC1U10V5KX V5REF_SUS +1.5VSUS

BC441 SCD1U16V3KX

+3VSUS 1

+5VSUS 1

2

BC426 SCD1U16V3KX

D46 RB751V-40-U

R479 1KR3 2 VCC_IO BC404 SC1U10V5KX

S.C.

S.C.

2

BC432 SCD1U16V3KX

BC447 SCD1U16V3KX

BC471 SC1U10V5KX

+1.5VRUN

BC429 SCD1U16V3KX

BC430 SCD01U50V3KX

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

ICH4-M (3 of 3)
Size A3 Document Number

PEBBLE--02203
Sheet 17 of

Rev SD 40

Date: Thursday, March 13, 2003

+3VAUX_LAN

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

S.B.

2

BC173 BC141 BC94 BC98 BC438 C204 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V-U

+2.5VAUX_LAN L19 S.B. 1 2 AVDD_LAN MLB-1608080600A C90 SCD1U10V2MX-1 1

+3VRUN

+1.2VAUX_LAN

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

S.B.

C49 C184 C65 C80 C48 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V-U

BC140 BC120 BC92 BC119 C42 C64 C79 BC93 BC95 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V-U SC1U10V5KX

1

S.B.

+3VAUX_LAN +2.5VAUX_LAN +1.2VAUX_LAN 1 1 1 BC142 BC139 BC96 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 2 2 E12 H5 H6 H7 H8 J5 J6 J7 J8 J9 J10 K5 K6 K7 K8 K9 K10 L5 L10 M14 N14 P8 P12 P13 P14 K14 L13 P11 A13 F14 H14 P7 A11 F11 K12 L12 F12 F13 A14 A7 B3 C5 E1 E4 G1 K3 L4 N6 P2

+3VAUX_LAN +3VRUN

+2.5VAUX_LAN

AVDDL_LAN BIASVDD_LAN PLLVDD2_LAN PLLVDD3_LAN J14

2

1

S.B.

S.B.

S.B.

+2.5VAUX_LAN
BC118 SCD1U10V2MX-1 C205 SC1U10V5KX S.B. R408 R407 R406 R405 R404 R403 R402 R400 49D9R3F 2 1 49D9R3F 2 1 49D9R3F 2 1 49D9R3F 2 1 49D9R3F 2 1 49D9R3F 2 1 49D9R3F 2 1

2

+2.5VAUX_LAN

+1.2VAUX_LAN L39 1 2 MLB-1608080600A

1 C309 SCD1U10V2MX-1

S.B.

U21 2

Place near Chip

* S.C.:place close to LAN switch.

AVDD AVDD

VDDP VDDP VDDP

PLLVDD2 NC

VDDIO VDDIO VDDIO VDDIO

AVDDL AVDDL

VDDIO-PCI VDDIO-PCI VDDIO-PCI VDDIO-PCI VDDIO-PCI VDDIO-PCI VDDIO-PCI VDDIO-PCI VDDIO-PCI VDDIO-PCI

XTALVDD

BIASVDD

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

S.B.
RDAC

20,23,26,28 NB_PME# 16,20,23,26 P_PERR# 16 P_REQ#4 16,20,23,26 P_TRDY# 16,20,23,26 P_PAR 16,20,23,26 P_AD[0..31] P_AD0 P_AD1 P_AD2 P_AD3 P_AD4 P_AD5 P_AD6 P_AD7 P_AD8 P_AD9 P_AD10 P_AD11 P_AD12 P_AD13 P_AD14 P_AD15 P_AD16 P_AD17 P_AD18 P_AD19 P_AD20 P_AD21 P_AD22 P_AD23 P_AD24 P_AD25 P_AD26 P_AD27 P_AD28 P_AD29 P_AD30 P_AD31

A6 J2 C3 G3 J1 N7 M7 P6 P5 N5 M5 P4 N4 P3 N3 N2 M1 M2 M3 L1 L2 K1 E3 D1 D2 D3 C1 B1 B2 B4 A5 B5 B6 C6 C7 A8 B8

PME_L PERR_L REQ_L TRDY_L PAR AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 CBE_0_L CBE_1_L CBE_2_L CBE_3_L DEVSEL_L FRAME_L GNT_L IDSEL INTA_L IRDY_L M66EN STOP_L PCI_RST_L SERR_L

RDAC TRD0TRD0+ TRD1TRD1+ TRD2TRD2+ TRD3TRD3+

D10 B14 B13 C14 C13 D14 D13 E14 E13 H13 G12 G13 G14 E10 G11 E11 H11 M10 P10 H12 K13 J13 A10 C9 B10 A9 B9 C11 C10 B11 C12 D12 B12 A12 D11 A1 G2 P1 C8 J12 N10 N11

49D9R3F 2 1

LAN_MDI_0LAN_MDI_0+ LAN_MDI_1LAN_MDI_1+ LAN_MDI_2LAN_MDI_2+ LAN_MDI_3LAN_MDI_3+ 100M_LINK# 1G_LED# 10M_LINK# LAN_ACT_LED#

S.C. S.C. S.C. S.C.

U49 L44 L45 L46 L47 L48 L49 L50 L51 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 IND-18NH IND-18NH IND-18NH IND-18NH IND-18NH IND-18NH IND-18NH IND-18NH 2 4 8 10 15 17 21 23 3 5 7 9 11 13 16 18 20 22 27 30 33 37 40 43 46 A0 A1 A2 A3 A4 A5 A6 A7 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 0B1 1B1 2B1 3B1 4B1 5B1 6B1 7B1 0B2 1B2 2B2 3B2 4B2 5B2 6B2 7B2 NC SEL VDD VDD VDD VDD VDD 48 47 42 41 35 34 29 28 45 44 39 38 32 31 26 25 14 24 1 6 12 19 36 1 BC384 SCD1U10V2MX-1 DOCKED +3VAUX_LAN TGN0 TGP0 TGN1 TGP1 TGN2 TGP2 TGN3 TGP3 D_TR0N D_TR0P D_TR1N D_TR1P D_TR2N D_TR2P D_TR3N D_TR3P 27 27 27 27 27 27 27 27

To on Board Lan Conn

*SD

Broadcom LAN Gigabit BCM5705M

SPD100LEDB SPD1000LEDB LINKLEDB TRAFFICLEDB SI SO SCLK CS_L EECLK EEDATA GPIO0 GPIO1 GPIO2 SMB_CLK SMB_DATA REGCTL12 REGSEN12 REGSUP12 REGCTL25 REGSEN25 REGSUP25 TCK TDI TDO TMS TRST_L VESD3 VESD2 VESD1 CSTSCHG VAUXPRSNT

+3VAUX_LAN BC437 1 2 1 1 1 R650 4K7R3 2 R134 R491 1KR3 10KR3 8 7 6 5 2 2

S.B.

SCD1U10V2MX-1 U66 VCC WP SCL SDA A0 A1 NC GND 1 2 3 4

To D-Dock Conn

S.D.

EE_WP ALERT_CLK ALERT_DAT CTRL_12 +1.2VAUX_LAN CTRL_25

24C256N-10SI

POWER FOR LAN
+2.5VAUX_LAN

32K*8 EEPROM

3

+2.5VAUX_LAN +2.5VAUX_LAN +3VAUX_LAN
1

1 2 +1.2VAUX_LAN

Q68 BCP69T1

LAN switch

PI3L301DA

2 1

S.B.
R4 0R3-U

2

1

3

CN16 MLXCON2 1 2

16,20,23,26 P_C/BE#[0..3]

P_C/BE#0 M4 P_C/BE#1 L3 P_C/BE#2 F3 P_C/BE#3 C4 H3 F2 J3 A4 H2 F1 F4 H1 C2 A2 A3 1 R244 22R3

2

S.B.

2

C207 C208 SCD1U10V2MX-1 SC22U10V-1

S.B.

C206 SCD1U10V2MX-1

2 L1 3

1 4

NS

TIP RING

R191 1

2 4K7R3 4

16,20,23,26 P_DEVSEL# 16,20,23,26 P_FRAME# 16 P_GNT#4 1 2 100R3 P_AD16 R243 16,20 PIRQC# 16,20,23,26 P_IRDY# 16,20,23,26 P_STOP# 7,10,16,20,23,26,29 PCIRST# 16,20,23,26 P_SERR# 3 PCLK_LAN

+3VAUX_LAN
+3VRUN 3

ACM2520U6012P-U 1 R3 0R3-U 2

1 R159 1 LAN_X0 LAN_X1 1 2 4K7R3 R160 0R3-U X2 1 2 2 2

Q27 BCP69T1 +2.5VAUX_LAN S.B.

Co-Layout with L52 For Modem Cable from MDC

+3VAUX_LAN
1 1 1 1 C74 SC10U6D3V5MX S.B. C283 SC10U6D3V5MX S.B. C73 SC10U6D3V5MX S.B. C284 SC10U6D3V5MX S.B. 1 2 C89 SCD1U10V2MX-1

CLKRUN# NC NC NC NC NC NC NC NC NC LOW_POWER NC NC NC NC NC

PCI_CLK

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

ICH4 only support PCI 33 MHz Bus
2

XTALO XTALI

2

2

2

2

S.B.

+2.5VAUX_LAN BC116 SC22P

B7 D4 D5 D6 D7 D8 D9 E2 E5 E6 E7 E8 E9 F5 F6 F7 F8 F9 F10 G4 G5 G6 G7 G8 G9 G10 H9 K2 L6 L9 M6 M12 M13 N1 N12 N13

H4 H10 J4 J11 K4 K11 L7 L8 M8 M9 M11 N8 N9 P9 L11 L14

2

2

2

2

3

PLLVDD3_LAN 1 1 C45 SC2D2U10V5KX

2

2

2

S.B.

S.B.

S.B.

+1.2VAUX_LAN PLLVDD2_LAN 1 1 C78 SC2D2U10V5KX L15 1 2 MLB-1608080600A C77 SCD1U10V2MX-1

Place RDAC CKT as close to chip as possible N.S. S.C.

2

C44 SCD1U10V2MX-1

S.B.

1

L11 1 2 MLB-1608080600A

RDAC 1 G D S 1 Q19 2N7002

R199 1 0R3-U

0R3-U 2

Proto-1B
P_CLKRUN# 16,20,23,29 R361

Proto-3B
LAN_ACT_LED#

C46 SCD1U10V2MX-1

27,28 DOCKED

10 7 4 1 12 11 9 8 6 5 3 2

TCT4 TCT3 TCT2 TCT1 TD4TD4+ TD3TD3+ TD2TD2+ TD1TD1+

MCT4 MCT3 MCT2 MCT1 MX4MX4+ MX3MX3+ MX2MX2+ MX1MX1+

15 18 21 24 13 14 16 17 19 20 22 23

2 +3VAUX_LAN AJK1 A5

Place PLLVDD2_LAN/PLLVDD3_LAN S.D. CKT as close to chip as +1.2VAUX_LAN possible

R192 1

R42 0R3-U U6

1

BC175 SC5P

1

1

1

1

BC117 SC22P LAN_LOW_PWR 28

2

S.C.

R20 75R2

S.C.

R19 75R2

S.C.

R18 75R2

1

S.B.

BCM5705MKF

XTAL-25MHZ-3-U

*Proto-3B

2 BC8 SC1000P3KV8KX

S.C.
+3VAUX_LAN

R17 75R2

1 3 330R3 Q34 RHU002N06

2 LAN_LED_ACT#

TGN0 TGP0 TGN1 TGP1 TGN2 TGP2

RJ45-2 RJ45-1 RJ45-6 RJ45-3 RJ45-5 RJ45-4 RJ45-8 RJ45-7

1

RING TIP

R194 30KR3F 2 2

R195 1K15R3F

LAN_ACT_LED# 27

S.C.

23 WLAN_LED_ACT

2

RJ11_1 RJ11_2 B1 LAN_LED_ACT# B3 RJ45_1 RJ45-1 RJ45_2 RJ45-2 RJ45_3 RJ45-3 RJ45-4 RJ45_4 RJ45-5 RJ45_5 RJ45-6 RJ45_6 RJ45_7 RJ45-7 RJ45_8 RJ45-8 LAN_LED_10M# A3 LAN_LED_100M# A1

B2

S.B.

1

1

2

2

3

1

BIASVDD_LAN

2

S.B.

*SE
2 1

2

2

+2.5VAUX_LAN R193 1 2 MLB-1608080600A S.B. C75 C182 SC1000P50V3KX SCD1U10V2MX-1 1

+3VSUS 1

D3 BAT54C-U R353 Q39 47K 2 R1 IN R2 D27 BAT54C-U DTC144EUA Q1 47K R1 R2 DTC144EUA 1 3 OUT 2 1 GND 1 330R3 D33 BAT54C-U 3

100M_LED# 27 2 LAN_LED_100M#

BC31 SCD01U16V2KX BC28 SCD01U16V2KX BC27 SCD01U16V2KX BC26 SCD01U16V2KX

S.B.

S.B.

2

C76 SCD1U10V2MX-1

*S.C.

S.B.

TGN3 TGP3

+3VAUX_LAN

100M_LINK#

2

XFORM-114

A3 A1 A2

R513 10KR3

23 WLAN_5_ON RN8 SRN10KJ

1

R364 10KR3

2

Link: Green - 10Mbps/802.11b Orange - 100Mbps/802.11a Yellow - 1Gbps S.B..B..B..B. Activity: Yellow S S S

A2 A4

3 4

S.C.

SKT-RJ11+RJ45-U1 22.10177.531

1

10M_LINK# ALERT_CLK 23 WLAN_24_ON 1 R11 10KR3 1G_LED#

3

Q71 3,12,16,23 SMBC_ICH 1 2 S Q72 3,12,16,23 SMBD_ICH 2 S 3 2N7002 D R233 1 2 0R3-U ALERT_DAT 1 3 2N7002 R232 1 2 0R3-U 2 2 IN G D

3 OUT 1 GND

R27 1 330R3 10M_LED# 27 1G_LED# 27 Title 2 LAN_LED_10M#

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

G

Gigabit LAN
Size Document Number Custom

LED Control Logic

PEBBLE--02203
Sheet 18 of

Rev SE 40

Date: Thursday, March 13, 2003

Modem Connector
+3VSUS 1 R206 0R3-U 2 AC97_3V AC97_5V 1 R203 2 DUMMY-R3 +5VRUN

BC149 SC4D7U10V-U

BC148 SCD1U16V3KX 35 CN19

BC145 SCD1U16V3KX

R499 24 MOD_AUDIO_OUT 1 0R3-U 2 1

AC97_3V 1

Check Power plane on MDC
+3VRUN

*S.C.
2

R498 DUMMY-R3

15 MDC_SDOUT

15,24 ICH_AC_RST# 1

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 33 36

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 34

1

31

32

MOD_AUDIO_IN 24

2

2

R517 10KR3

BC123 DUMMY-C3

1

R204 33R3

MDC_SYNC 15 2 ICH_AC_DIN1 15 R207 DUMMY-R3 1 2 BC147 DUMMY-C3 MDC_BITCLK 24 1 R205 15R3 2 2 1 BC146 SC22P 15

BC473 SCD1U16V3KX 2

R518 39R3

BC474 SC47P

AMP-CONN30A-1

20.F0099.030
BC472 SC47P

BC182 SC10P

HDD & SMART CARD CONNECTOR

SC_VCC

1 2 C260 SCD1U10V2MX-1

CN15 20,21,28 SCR_DETECT SCR_DETECT 2 MH1 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 MH2 50 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49

SC_I/O SC_RST# SC_CLK

+3VSUS SC_I/O 21 SC_RST# 21 SC_CLK 21 HDDC_EN# 28,33

+5VHDD

SC_VCC

BC505 SCD1U16V3KX

BC506 SC4D7U10V-U

32 IDEACT# 15 PIDE_CS1# 15 PIDE_A0 15 PIDE_A1 15 PIDE_DACK# 15 PIDE_IOR# 15 PIDE_DREQ PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7

PIDE_CS3# 15 PIDE_A2 15 IRQ14 15 HDD_RDY HDD_CSEL PIDE_D15 PIDE_D14 PIDE_D13 PIDE_D12 PIDE_D11 PIDE_D10 PIDE_D9 PIDE_D8 PIDE_IOW# 15 1

R565 2 47R3F 2 R564 470R3 1 PIDE_IORDY

15 PIDE_D[0..15]

PD on HDD board

28 IDE_RST_HDD#

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

SPD-CONN50A-3-U 20.E0060.225

*SD

HDD & MDC CONN.
Size A3 Document Number

PEBBLE--02203
Sheet 19 of

Rev SD 40

Date: Thursday, March 13, 2003

+3VSUS 16,18,23,26 P_AD[0..31] P_AD31 P_AD30 P_AD29 P_AD28 P_AD27 P_AD26 P_AD25 P_AD24 P_AD23 P_AD22 P_AD21 P_AD20 P_AD19 P_AD18 P_AD17 P_AD16 P_AD15 P_AD14 P_AD13 P_AD12 P_AD11 P_AD10 P_AD9 P_AD8 P_AD7 P_AD6 P_AD5 P_AD4 P_AD3 P_AD2 P_AD1 P_AD0 16,18,23,26 P_C/BE#[0..3] P_C/BE#3 P_C/BE#2 P_C/BE#1 P_C/BE#0 L6 P2 U5 V7 C/BE3# C/BE2# C/BE1# C/BE0# CC/BE3#/REG# CC/BE2#/A12 CC/BE1#/A8 CC/BE0#/CE1# CRST#/RESET CFRAME#/A23 CIRDY#/A15 CTRDY#/A22 CDEVSEL#/A21 CSTOP#/A20 CPERR#/A14 CSERR#/WAIT# CPAR/A13 CREQ#/INPACK# CGNT#/WE# CCLK/A16 CSTSCHG/BVD1/STSCHG#/RI# CCLKRUN#/WP/IOIS16# CBLOCK#/A19 CINT#/READY/IREQ# CAUDIO/BVD2/SPKR# CCD2#/CD2# CCD1#/CD1# CVS2/VS2# CVS1/VS1# CRSVD/D2 CRSVD/A18 CRSVD/D14 J5 J6 K2 K3 K5 K6 L2 L3 M2 M3 M6 M5 N2 N3 N6 P1 R6 P7 V5 U6 V6 R7 P8 U7 W7 R8 U8 V8 W9 V9 U9 R9 U35A AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 CAD31/D10 CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6 CAD19/A25 CAD18/A7 CAD17/A24 CAD16/A17 CAD15/IOWR# CAD14/A9 CAD13/IORD# CAD12/A11 CAD11/OE# CAD10/CE2# CAD9/A10 CAD8/D15 CAD7/D7 CAD6/D13 CAD5/D6 CAD4/D12 CAD3/D5 CAD2/D11 CAD1/D4 CAD0/D3 E8 C8 B8 E9 F9 F11 E11 C11 A12 C12 E12 C13 A14 E13 B14 F18 G17 F19 G18 H15 H14 H17 H18 J14 J17 K14 J19 K17 K15 L14 K18 L15 B11 C14 G15 J15 B13 B15 F13 E14 A16 E17 F15 E10 F14 B12 D19 C15 A9 B9 E18 C10 CBS_CAD31 CBS_CAD30 CBS_CAD29 CBS_CAD28 CBS_CAD27 CBS_CAD26 CBS_CAD25 CBS_CAD24 CBS_CAD23 CBS_CAD22 CBS_CAD21 CBS_CAD20 CBS_CAD19 CBS_CAD18 CBS_CAD17 CBS_CAD16 CBS_CAD15 CBS_CAD14 CBS_CAD13 CBS_CAD12 CBS_CAD11 CBS_CAD10 CBS_CAD9 CBS_CAD8 CBS_CAD7 CBS_CAD6 CBS_CAD5 CBS_CAD4 CBS_CAD3 CBS_CAD2 CBS_CAD1 CBS_CAD0 CBS_CC/BE#[3..0] CBS_CC/BE#3 CBS_CC/BE#2 CBS_CC/BE#1 CBS_CC/BE#0 21 CBS_CAD[31..0] 21 1 1 1 +3VSUS 1 R234 DUMMY-R3 R308

Cable power states input: 390K ohm to 1394Vcc if use 6pin 1394 conn
R235 1KR3 1 2 2 10KR3 PHY_CPS P10 PHY_CNA P17

+3VSUS U35B CPS CNA VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC G1 M1 R1 W8 L19 H19 E19 A13 A8 A5 1

CBS_VCC

2

2

R236 DUMMY-R3

R282 DUMMY-R3

BC219 BC220 SCD1U10V2MX-1 SCD1U10V2MX-1 +3VSUS

2

2

2

PCI7510

CBS_PC0 V10 CBS_PC1 W10 CBS_PC2 P9 R237 0R3-U R284 1 PCI4515_R0 W13 PCI4515_R1 V13

PC0 PC1 PC2 R0 R1

1

1 2 2 BC169 BC166 SCD1U10V2MX-1 SCD1U10V2MX-1 1 BC262 SCD1U16V3KX

R281 0R3-U 2 2

R283 0R3-U 2

DUMMY-R3 2

PCI7510

1

1

1

VCCCB VCCCB VCCP VCCP

G14 A11 L1 W5 G2 L18 E6 B5 A4 C5 E1 K1 N1 W6 P19 K19 G19 A15 A10 A7 H5 1V8_VR_EN# BC174 SCD1U16V3KX

R280 1

2 6K34R3F V12 W12 V15 W15 V11 W11 R277 1 R279 1 2 0R3-U 2 0R3-U V14 W14 U12 U15 +3V_CBSA R11 U13 U14 U11 R12 R13 P15 AVD2 AVD3 AVD4 AGN2 AGN3 AGN4 VDPLL

21 IEEE1394_TPA0P 21 IEEE1394_TPA0N

TPA0P TPA0N TPA1P TPA1N

1.8V 1.8V VD1/VCCD0# VD0/VCCD1# VD3/VPPD0 VD2/VPPD1

CBS_VCCD0# 21 CBS_VCCD1# 21 CBS_VPPD0 21 CBS_VPPD1 21

+3VSUS 1

21 IEEE1394_TPB0P 21 IEEE1394_TPB0N

TPB0P TPB0N TPB1P TPB1N TPBIAS0 TPBIAS1 VR_EN# 2 2 SUSPEND# RI_OUT#/PME# SPKROUT MFUNC0/INTA# MFUNC1/INTB# MFUNC2 MFUNC3 MFUNC4 MFUNC5/LED_SKT MFUNC6/TEST2 G3 J3 E2 F5 G6 F3 F2 G5 F1 H6 PIRQD# 16,23 PIRQC# 16,18 P_REQB# 16 SERIRQ 16,29 CBS_RI# 16 P_GNTB# 16 P_CLKRUN# 16,18,23,29 1 TI_SUSPEND#_INTERNAL D22 1 GND GND GND GND GND GND GND GND GND GND +3VSUS R239 DUMMY-R3

1

21 IEEE1394_TPBIAS0 CBS_CRST# 21 CBS_CFRAME# 21 CBS_CIRDY# 21 CBS_CTRDY# 21 CBS_CDEVSEL# 21 CBS_CSTOP# 21 CBS_CPERR# 21 CBS_CSERR# 21 CBS_CPAR 21 CBS_CREQ# 21 CBS_CGNT# 21 IEEE1394_TPBIAS1 1 C102 SCD1U10V2MX-1

R245 10KR3

1 R241 0R3-U

16,18,23,26 P_PAR

W4

PAR

2

S.C.
2 TI_SUSPEND# 28

16,18,23,26 P_DEVSEL# 16,18,23,26 P_FRAME# 16 P_GNT#1 16,18,23,26 16,18,23,26 16 16,18,23,26 16,18,23,26 16,18,23,26 7,10,16,18,23,26,29 P_IRDY# P_PERR# P_REQ#1 P_SERR# P_STOP# P_TRDY# PCIRST#

R2 N5 J1 P3 R3 J2 T1 P5 P6 H3 H2 R238 2 100R3 TI_IDSEL L5 H1 1 R240 33R3 2

DEVSEL# FRAME# GNT# IRDY# PERR# REQ# SERR# STOP# TRDY# PRST# GRST# IDSEL PCLK

RB751V-40-U NB_PME# 18,23,26,28 PCM_SPKR 25

1

R298 47R3

2

CBS_CCLK 21

CBS_CSTSCHNG 21 CBS_CCLKRUN# 21 CBS_CBLOCK# 21 CBS_CINT# 21 R313 0R3-U 1 R310 0R3-U BC267 SC270P50V3JN BC269 SC270P50V3JN 2 CBS_CCD#1 21 2

2 R242 1 2 0R3-U R158 43KR3 2 CBS_SCL CBS_SDA R307 R275 R276 1 1 1 2 4K7R3 2 200R3 2 200R3

1

2

28 CBUS_GRST# P_AD17 1

F10 CBS_CAUDIO 21 C9 CBS_CCD#2_INTERNAL L17 CBS_CCD#1_INTERNAL F12 B10 F8 F17 J18 CBS_CVS2 21 CBS_CVS1 21 CBS_RSVD/D2 21 CBS_RSVD/A18 21 CBS_RSVD/D14 21

CBS_CCD#2 21 1 FILTER0 FILTER1

N14 T19 R17 N15 M14 N17 N18 N19 M15 M17 M18 M19 SC_CD# B7 C7 F7 A6 B6 E7 C6 W16 P14 P13 P12 P11 R14 E5

VSPLL FILTER0 FILTER1 MC_PWR_CTRL

BC218 SCD1U10V2MX-1

UM_PWR_CTRL

SCL SDA PHY_TEST_MA TEST0 TEST1 CLK_48_RSVD

E3 D1

+3VSUS

3 PCLK_PCM

NS
21 SCR_GPIO5 21 SCR_GPIO6 21 SCR_GPIO1 21 SCR_GPIO0 R309

PCI7510

S.B.

RESERVED MS_INS/SD_CD RESERVED SD_WP# RESERVED MS_BS/SD_DATA1/IRQ SC_GPIO5 MS_SDIO/SD_DATA0 RESERVED MS_SCLK/SD_CLK SC_GPIO6 MS_RFU5/SD_CMD SC_GPIO1 MS_RFU7/SD_CD/DATA3 SC_GPIO0 SD_DATA2
SC_CD# SC_RST SC_CLK SC_DATA SC_PWR SC_MODE SC_FCB NC NC NC NC NC NC NC PCI7510

P18 PHY_TEST_MA U10 CBS_TEST0 R10 CBS_TEST1 F6

BC171 SC5P

CLK_48M_SCR 3 1 R285 DUMMY-R3

S.D.

19,21,28 SCR_DETECT

1

2 DUMMY-R3 R312 0R3-U 1 21 21 21 21 21 21 SCR_RST SCR_CLK SCR_DATA SCR_GPIO3 SCR_GPIO2 SCR_GPIO4 2

XI

R18 PCI4515XI

SC_GPIO3 SC_GPIO2 SC_GPIO4

XO

X6 1 2 BC260 SC22P X-24D576MHZ-3-U BC261 SC22P

1 C99 DUMMY-C3 1 R246 DUMMY-R3

+3VSUS 1 2 MLB-201209-19 BC259 SCD1U16V3KX L24 S.B.

+3V_CBSA

RN55 2 1 SRN10KJ 3 4 SCR_GPIO3 SCR_GPIO2

2

2

2

2

2

BC258 SC10U6D3V5MX

BC216 SCD1U10V2MX-1

BC217 SCD1U10V2MX-1

BC214 SCD1U10V2MX-1

BC215 SCD1U10V2MX-1

1

2 1

RN56

S.B.
3 4 SCR_GPIO1 SCR_GPIO0

+3VSUS

1

1

1

1

1

SRN10KJ

R286 DUMMY-R3

If has ROM 2K7 ohm PU

2

CBS_SCL CBS_SDA 1 1 1 BC265 SC10U6D3V5MX BC167 SC10U6D3V5MX BC176 SC10U6D3V5MX BC221 SCD1U16V3KX BC263 SCD1U16V3KX BC264 SCD1U16V3KX BC266 SCD1U16V3KX BC172 SCD1U16V3KX BC170 SCD1U16V3KX BC168 SCD1U16V3KX BC201 SCD1U16V3KX BC206 SCD1U16V3KX BC205 SCD1U16V3KX

1

2

2

2

R248 220R3 2 2

1

2

+3VSUS

R247 220R3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

CARDBUS CONTROLLER
Size Document Number Custom

2

+3VSUS

2

R19 PCI4515XO

PEBBLE--02203
Sheet 20 of

Rev SD 40

Date: Thursday, March 13, 2003

Power switch
+3VSUS 2 BC296 SCD1U16V3KX 1 BC491 SC2D2U10V5KX U41 20 CBS_VCCD0# 20 CBS_VCCD1# 1 2 3 4 5 6 BC492 SC2D2U10V5KX 8 7 VCCD0# VCCD1# 3.3V 3.3V 5V 5V OC# GND TPS2211A VPPD0 VPPD1 AVCC AVCC AVCC AVPP SHDN# 12V 15 14 13 12 11 10 16 9

+3VSUS 2 R311 10KR3 1

CN20 20 CBS_CAD[31..0] 20 CBS_CC/BE#[3..0] CBS_VPPD0 20 CBS_VPPD1 20 CBS_VCC 1 L41 0R5 2 1 TC46 ST150U6D3V-1-U BC489 SC4D7U10V-U 1 BC488 SC10U10V-U1 BC486 SC1000P50V3KX 20 CBS_RSVD/D14 CBS_VCCF CBS_CAD0 20 CBS_CCD#1 CBS_CAD1 CBS_CAD2 CBS_CAD3 CBS_CAD4 CBS_CAD5 CBS_CAD6 CBS_CAD7 CBS_CC/BE#0 CBS_CAD8 CBS_CAD9 CBS_CAD10 CBS_CAD11 CBS_CAD12 CBS_CAD13 CBS_CAD14 CBS_CAD15 CBS_CC/BE#1 CBS_CAD16 69 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68 70

S.B.

+5VSUS

2

1

2

BC478 SCD1U16V3KX

2

BC332 SCD1U16V3KX

S.C.

S.B.

+12V

CBS_VPP

20 CBS_CVS1 BC271 SC1U16V5KX-U BC270 SCD1U16V3KX BC268 SCD1U16V3KX

1394 conn.
20 CBS_CCLK 1 1 1 R40 56D2R3F 20 IEEE1394_TPBIAS0 20 IEEE1394_TPA0P 20 IEEE1394_TPA0N 20 IEEE1394_TPB0P 20 IEEE1394_TPB0N 1 1 R372 R370 R371 TR4 2 2 R41 56D2R3F BC25 SC1U10V5KX

20 CBS_CPAR 20 CBS_RSVD/A18 20 CBS_CPERR# 20 CBS_CBLOCK# 20 CBS_CGNT# 20 CBS_CSTOP# 20 CBS_CINT# 20 CBS_CDEVSEL# CBS_VCCF CBS_VPP 20 CBS_CTRDY# 20 CBS_CIRDY# 20 CBS_CFRAME#

NS
JK2 3 TPA1+ 4 3 2 1 PHONE-JK68-U 6

R547 10R3 2

S.D.
TR3 2 1

TPA14 ACM3225-161-2P 1 4 TPB1+ 2 3 TPB1-

CLK for 32-bit Cardbus PC Card I/F

CBS_CC/BE#2 CBS_CAD17 CBS_CAD18 CBS_CAD19 CBS_CAD20 CBS_CAD21 CBS_CAD22 CBS_CAD23 CBS_CAD24 CBS_CC/BE#3 CBS_CAD25 CBS_CAD26 CBS_CAD27 CBS_CAD28 CBS_CAD29 CBS_CAD30 CBS_CAD31

BC487 SC10P

20 CBS_CVS2 20 CBS_CRST# 20 CBS_CSERR# 20 CBS_CREQ#

Clock termination close to CONN
5

2 56D2R3F 2

2 5K11R3F 1394_TPB1_R BC360 SC220P

1

ACM3225-161-2P

S.D.

S.C.

20 CBS_CAUDIO 20 CBS_CSTSCHNG TPA1+ TPA1TPB1+ TPB1D38 D37 D35 D34 1 1 1 1 2 2 2 2 PGB0010603MR PGB0010603MR PGB0010603MR PGB0010603MR

56D2R3F

*S.D=>1206 size. NS
IEEE1394_TPA0P IEEE1394_TPA0N IEEE1394_TPB0P IEEE1394_TPB0N R36 R37 R368 R369 1 1 1 1 2 2 2 2 10R6-U1 10R6-U1 10R6-U1 10R6-U1 TPA1+ TPA1TPB1+ TPB1-

20 CBS_RSVD/D2 20 CBS_CCLKRUN# 20 CBS_CCD#2

Co-layout with TR4,TR3

ESD suppressor Place near JK2
+3VSUS SKT5

NS

Smart Card
1 2 U42 20 20 20 20 20 20 20 20 20 20 SCR_GPIO0 SCR_GPIO1 SCR_GPIO2 SCR_GPIO3 SCR_GPIO4 SCR_GPIO5 SCR_RST SCR_DATA SCR_GPIO6 SCR_CLK 1 2 3 4 5 6 7 8 9 10 A0 A1 PGM# PWR_ON STATUS CS# RESET# I/O INT# CLOCK_IN NCN6000DTB VBAT LOUT_H LOUT_L PWR_GND GROUND CRD_VCC CRD_IO CRD_CLK CRD_RST CRD_DET 20 19 18 17 16 15 14 13 12 11 1

(Reverse Type) S.D.

PCMCIA-15

4 1 BC297 SCD1U10V2MX-1 BC298 SC10U10V-U1 SC_VCC +3VSUS 1 R566 10KR3 1 5 7 9 11 13 15 17 19 MH3 3

1 MH1 6 8 10 12 14 16 18 20 MH2 2

2

S.C.

Murata LQH3C220K34
L27 2 1 BC333 SCD1U10V2MX-1 2

COIL-22UH-1 SC_I/O SC_CLK SC_RST#

SC_I/O 19 SC_CLK 19 SC_RST# 19

R349 10KR3 2

2

CARDBUS-SKT34 SCR_DETECT 19,20,28

C112 SC330P50V3KX

C113 SC47P

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

NS

S.D.

To Smart card conn. (Through HDD conn.)

CARDBUS CONNECTOR & POWER SWITCH
Size A3 Document Number

PEBBLE--02203
Sheet 21 of

Rev SD 40

Date: Thursday, March 13, 2003

TO D DOCK
R105 15 USBP5N 1 0R3-U R104 15 USBP5P 1 0R3-U 2 D_USBP5P 27 2 D_USBP5N 27

*SE
USB Port# 0 Destination

USB Common mode choke MURATA PLW3216S900SQ2
USBPWR0 5

USB4
USBP4N_CONN USBP4P_CONN 1 2 3 4 CN3 FCI-USB-4P-1U 22.10218.991

4 15 USBP4N

3 TR2 L-63UH 2

1 2 3 4 5

BlueTooth

Power USB Rear D-Dock
15 USBP4P 1

ICH4 provides an output driver impedance of 45 Ohm and integrates 15K Ohm Pull-down R USB Common mode choke MURATA PLW3216S900SQ2
USBP4N_CONN USBP4P_CONN D29 D28 1 1 2 PGB0010603MR 2 PGB0010603MR

NS

Dual USB switch for USB0/Power USB
1 +5VSUS U4 3 2 4 1 5 IN INA INB ONA ONB FAULTA# FAULTB# OUTA OUTB GND 10 6 9 7 8 2

ESD suppressor Place near CN9&10

+3VSUS

R654 10KR3

1

S.C.
Pull up @ ICH4-M side
USB_OC#4 15 USB_OC#3 15 USBPWR0 DH_SMBDAT

+5VSUS R655 10KR3 1

+5VSUS 1

*SD,NS
Q90 1 2 6 5 4 SI1906DL 2

2

R627 10KR3 DAT_SMB 6,28,30 2 2

R628 10KR3

2

1

BC15 SCD1U16V3KX

1

BC14 SC10U10V-U1 S.C.

TC11 ST150U6D3V-1-U

28 USB_EN

BC16 SCD1U16V3KX USB5V

6,28,30 CLK_SMB

3

DH_SMBCLK 4 5 6

Q91 3 2 1 SI1906DL DH_POWER_EN

MAX1823HEUB

1

L53 1 2 USBPWR3 MLB-201209-19

2

TC13 BC343 ST150U6D3V-1-U SCD1U16V3KX

SB

POWER USB
USB Common mode choke MURATA PLW3216S900SQ2
USB5V 1 4 3 15 USBP3N TR1 L-63UH USBP3N_CONN USBP3P_CONN 2 3 4 1 2 SKT2 G3 G1 5 6 7 8 9 G2 G4 SKT-USB+PWR-1 USB_PWR_SRC DH_SMBDAT 1 R656 2 (SMB_ALERT#) 150R3 DH_SMBCLK L43 1 2 USB_PWRSRC 1 F1

PWR_SRC

1

Id=-4A,Vds=-30V
D D G D D S 4 5 6 3 2 1 2 Q81

R591 100KR3

1

*SD
2

FDC658P USB_PWRSRC_2 3 2 D S

R592 10KR3 Q82 2N7002 1 G 2

1

R593 10KR3

BLM21PG600SN1 DH_MOD_PRES# 28

3A,60ohm@100MHz,DCR:0.025ohm
1

1.5A/33V,It=3A

FUSE-1D5A33V-1-U

NS
DH_POWER_EN 28

15 USBP3P

*SD

C346 SC1000P50V3KX

+3VSUS D73

*SE
D74

1 1

USBP3N_CONN USBP3P_CONN 3 DH_SMBCLK

D31 D30

1 1

2 PGB0010603MR 2 PGB0010603MR

1

ESD suppressor Place near SKT1

S.B.

NS

2

C282 SCD1U50V5KX

R594 100KR3

(PU on Macallen side)
DH_PWRSRC_OC 3 1 G R596 100KR3 2 D S Title Q83 2N7002 28

2

6

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

DH_SMBDAT 3 DA204U-U1 2 2

2

USB CONNECTOR
Size A3 Document Number

DA204U-U1

NS

PEBBLE--02203
Sheet 22 of

Rev SE 40

Date: Thursday, March 13, 2003

MINIPCI SLOT
+3VRUN +3VRUN 2 BC177 SCD1U16V3KX BC143 SCD1U16V3KX BC144 SCD1U16V3KX BC209 SCD1U16V3KX 1 BC210 SC10U10V-U1

S.C.

BC178 SCD1U16V3KX

BC204 SCD1U16V3KX

BC208 SCD1U16V3KX

BC203 SCD1U16V3KX

PLACE CAPs NEXT TO POWER PINS
SKT3 TIP PIN3-10 LAN RESERVED PIN11-16 ISOLATION BARRIER RD+ RDRJ45-7 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123

PLACE CAPs NEXT TO POWER PINS

125 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 RING TD+ TDRJ45-4 WLAN_24_ON 18 WLAN_5_ON 18 PIRQB# 16,26 PCIRST# 7,10,16,18,20,26,29 P_GNT#3 16 NB_PME# 18,20,26,28 P_AD30 P_AD28 P_AD26 P_AD24 MINI_IDSEL P_AD22 P_AD20 P_AD18 P_AD16 1 R618 0R3-U 2 1 R619 10KR3 2 BC97 SCD1U16V3KX BC222 SCD1U16V3KX +3VAUX_LAN +5VRUN

18 WLAN_LED_ACT 28,31 HW_RADIO_DISABLE# 3 PCLK_MINI 1 R287 33R3 16,20 PIRQD#

*S.C.

16 P_REQ#3 BC207 SC10P R620 1 2 P_AD31 P_AD29 P_AD27 P_AD25 P_C/BE#3 P_AD23 P_AD21 P_AD19 P_AD17 P_C/BE#2

2

COEX1_BT_ACTIVE 31

S.B.

31 COEX2_WLAN_ACTIVE

S.B.
1 R249 0R3-U P_PAR 16,18,20,26 2 P_AD19

S.B.

S.B.

0R3-U

NS Proto-1B

Note: Place R619 near mPCI connector.

+3VAUX_LAN

S.B.

16,18,20,26 P_IRDY# 16,18,20,29 P_CLKRUN# 16,18,20,26 P_SERR# 16,18,20,26 P_PERR# P_C/BE#1 P_AD14 P_AD12 P_AD10 P_AD8 P_AD7 P_AD5 P_AD3 +5VRUN P_AD1

P_FRAME# 16,18,20,26 P_TRDY# 16,18,20,26 P_STOP# 16,18,20,26 P_DEVSEL# 16,18,20,26 P_AD15 P_AD13 P_AD11 P_AD9 P_C/BE#0 P_AD6 P_AD4 P_AD2 P_AD0 MICLK_SMB MIDAT_SMB (M66EN)

+5VRUN 3 4 RN147 SRN10KJ Q87 2N7002 3 D 2 1 1 G 2 S 3 D

G

16,18,20,26 P_AD[31..0] 16,18,20,26 P_C/BE#[3..0]

SMBC_ICH 3,12,16,18 2 SMBD_ICH 3,12,16,18

1 Q88 2N7002 S

MB SUPPORT ONLY 33MHz PCI; PP221 PCI SPEC2.1 2 R161 1KR3 +3VSUS R615 1 10KR3 2 +3VAUX_LAN 1 BC202 SCD1U16V3KX

MINIPCI SPEC. Pin# 101 103 105 107 109 111 113 115 117 119 121 123 VCC5A GND AC_SYNC AC_SDATA_INA AC_BIT_CLK AC_PRIMARY# MOD_AUDIO_MON AUDIO_GND SYS_AUDIO_OUT SYS_AUDIO_OUT_GND AUDIO_GND Signal Pin# 102 104 106 108 110 112 114 116 118 120 122 124 GND M66EN AC_SDATA_OUT AC_SDATA_INB AC_RESET# RESERVED GND SYS_AUDIO_IN SYS_AUDIO_IN_GND AUDIO_GND MPCIACT# 3.3VAUX Signal

* S.C.

RAM-124P 62.10034.031

1 R164 0R3-U 2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

POWER REQUIREMENT TOTAL = 2W +5VRUN = 100 mA +3VAUX = 375 mAMPMAX

Mini-PCI CONNECTOR
Size A3 Document Number

PEBBLE--02203
Sheet 23 of

Rev SD 40

Date: Thursday, March 13, 2003

+5VSUS BC163 CODEC_XIN 2 SC22P BC165 SC4D7U10V-U BC199 SCD1U16V3KX 1 2 3

+5VA
S.B.

+5VA

X4 X-24D576MHZ-3-U BC164 SC22P 1 CODEC_XOUT

S.C.
U31 IN GND EN TPS793475 OUT BYPASS 5 4

1 R227 10KR3F

N.S.
1 2

BC194 SC4D7U10V-U S.B.

BC191 SC1000P50V3KX

N.S.

AUDPWR_SHDN#

28,31,33,34,35,38 RUN_ON

1

R230 0R3-U R228

2

+5VA=4.75V Vset=1.242V 200mA
2

R226 28KR3F

C289 SC1U10V5KX

N.S.
2

28 AUDIO_ON

1

*SC=>N.S.
BC112 SCD1U16V3KX R223 1 2 DUMMY-R3 R224 2 U26 45 46 2 3 10 6 5 8 11 25 38 CID0 CID1 XTL_IN XTL_OUT SYNC BIT_CLK SDATA_OUT SDATA_IN RESET# AVDD1 AVDD2 AVSS1 AVSS2 DVDD1 DVDD2 PC_BEEP PHONE AUX_L AUX_R VIDEO_L VIDEO_R CD_L CD_GND CD_R MIC1 MIC2 LINE_IN_L LINE_IN_R VREFOUT LINE_OUT_L LINE_OUT_R MONO_OUT HP_OUT_L HP_COMM HP_OUT_R GPIO1 EAPD SPDIF 12 13 14 15 16 17 18 19 20 21 22 23 24 28 35 36 37 39 40 41 43 44 47 48 EAPD CODEC_SPDIF 1 R616 10KR3 S.B. 2 1 33R3 HP_SPK_L HP_SPK_R SPK_SHUTDOWN# 25 SPDIF_SHDN 28 EAPD 25 R225 2 SPDIF_OUT 27 BC109 SC1000P50V3KX 1

*SC=>N.S.
1 R157 2 MOD_AUDIO_IN 19 1KR3 R154 6K8R3

DUMMY-R3

BC113 SCD047U25V3KX

N.S. S.C.
LINE_IN

*SC=>N.S.

2

N.S.

1

+5VA

15 CODEC_SYNC 15 ICH_AC_BITCLK 19 MDC_BITCLK 15 CODEC_SDOUT 15 ICH_AC_DIN0 15,19 ICH_AC_RST#

R189 1 R190 1 R185 1

2 33R3 2 33R3 2 33R3

ANALOG INPUT

AC'97 LINK

DUMMY-R3 CODEC_XIN CODEC_XOUT CODEC_SYNC CODEC_BCLK CODEC_SDOUT CODEC_SDI1

BC106 SCD1U16V3KX C_CODEC_MIC1 CODEC_MIC2 BC130 AUD_VREFO SC1U10V5KX C292 1 2 SCD22U10V3KX BC107 SC1U10V5KX

AC97-Link I/F

S.C.

CODEC_MIC1 25

BC161 SCD1U16V3KX +3VRUN

BC105 SCD1U16V3KX

26 42 1 9 4 7 BC137 SC2D2U10V5KX CODEC_VREF 27 29 30 32 31 33 34

TO Audio OP
AUDIO_OUT_L 25 AUDIO_OUT_R 25

OUTPUT

DVSS1 DVSS2 VREF AFILT1 AFILT2 CAP2 NC NC NC STAC9750-CC1-U

BC160

SC1U10V5KX

*SC=>N.S.

MOD_AUDIO_OUT 19 BC159 SC1000P50V3KX

2

BC134 SCD1U16V3KX

BC162 SCD1U16V3KX

1

S.B.

Jack Sense GPIO0

*SC=>N.S.

2

BC129 SCD1U16V3KX

1 BC131 SC2D2U10V5KX

S.B.
1 BC128 SC1000P50V 1 BC126 SC1000P50V

DAC Ref Voltage filter CAP

S.C.

+3VRUN 1 R421 100KR3

2

S.C.

2

S.C.
BC127 BC157 SC1000P50V3KX SCD1U16V3KX HP_SPK_R HP_SPK_L 2

JK4 G2 G1 5 4 3 6 2 1 AUDIO-JK29

25,28 HP_NB_SENSE TC25 ST150U6D3V-1-U R422 1 2 HP_SPK_R1 2 1 2 HP_SPK_L1 2 0R3-U 1 1

HP_SPK_R2 HP_SPK_L2 BC393 BC392 SC270P50V3JN SC270P50V3JN

TC21 ST150U6D3V-1-U

R391 0R3-U

*SD

S.B.

*SD:for EMI

AC'97 TERMINATIONS
CODEC_SYNC CODEC_SDOUT ICH_AC_RST#

HEADPHONE JACK
R229 75R3 1 R186 22R3 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. BC136 SC47P Title

S.C.

1

R188 22R3 2 2

1

Wistron Corporation
AUDIO (1 of 2) -- Codec
Size A3 Document Number

BC135 SC47P

BC138 SC47P

N.S.

PEBBLE--02203
Sheet 24 of

Rev SD 40

Date: Thursday, March 13, 2003

+5VSUS

GAIN0 GAIN1 0 0 1 1 0 1 0 1

AV 6dB 10dB 15.6dB 21.6dB N.S.R635
1 1 1KR3 2 2 1KR3 23 20 8 5 6 10 2 1 3 4 RN148 SRN100KJ

AUDIO OP
S.C.
U18 AUDIO_G0 AUDIO_G1 2 3 GAIN0 GAIN1 RLINEIN RHPIN RIN LLINEIN LHPIN LIN PC-BEEP HP/LINE# SHUTDOWN# SE/BTL# BYPASS TPA0312 BC111 SCD47U16V LOUT+ LOUTROUT+ ROUTGND GND GND GND GND PVDD PVDD VDD 4 9 21 16 1 12 13 24 25 18 7 19

+5VSUS

BC414 SC4D7U10V-U

BC110 SCD1U16V3KX

OP LINE OUT to AUDIO CONN for MONO Speaker on System
CN6 2 1 CON2-10-U 20.D0012.102

From CODEC LINE OUT
24 AUDIO_OUT_R

SPK_LOUT SPK_ROUT BC70 SC1000P50V3KX

BC86 1 2 SCD1U10V2MX-1 BC104 1 2 SCD1U10V2MX-1

R636 AUDIO_OUT_R1

BC69 SC1000P50V3KX

24 AUDIO_OUT_L

AUDIO_OUT_L1 +5VSUS 1 C290 SCD1U10V2MX-1 1 C291 SCD1U10V2MX-1

BC103 SC1000P50V3KX

BC68 SC1000P50V3KX BC114 SCD1U16V3KX 5 4 2 R187 1 2 10KR3 1

28 SIO_BEEP 16 ICH_SPKR 20 PCM_SPKR

1 3 6

A B C

VCC Y GND

BC132

PC_SPKRIN

1

PC BEEP

U19

14 17 22 15 11

2

2

NC7SZ386P6X-U

S.D.
2

SCD1U16V3KX R156 8K2R3 BC133 SC1000P50V3KX 2

R637 100KR3

S.D.

N.S.

+3VSUS 1 R155 100KR3 2 SPK_SHUTDOWN# Q23 47K R1 3 OUT 24 EAPD Q24 47K R1 3 OUT 24,28 HP_NB_SENSE Q98 47K R1 3 OUT

SPK_SHUTDOWN# 24

28 NB_MUTE

From Macallen

2 IN

1 GND R2 DTC144EUA

From Codec

2 IN

1 GND R2 DTC144EUA

From HP Jack

2 IN

1 GND R2 DTC144EUA

+5VA 1 R638 1KR3 2

+5VA 1 R639 100KR3 2

C293 SC1U10V5KX 2

R640 1KR3

BC88 SCD1U16V3KX U16

EXT MIC JACK
OUT AUX_IN BIAS INT#/AUX 2 8 3 1 CODEC_MIC1 24 C295 SCD1U16V3KX R642 1 R643 1 R644 1 2 0R3-U 2 0R3-U 2 0R3-U C297 C298 SC330P50V3KX SC330P50V3KX 1 2 6 3 4 5 G1 G2 AUDIO-JK29 1 R2 SW1 1 SW-FR2024 2 LID# 1 R1 100R3 BC1 SC1000P50V3KX 2 2 10KR3 LID_CL# 28 JK3

1

32 INT_MIC+

1

R641 0R3-U

REED SWITCH

+3VALW

2

C294

SCD1U16V3KX

32 INT_MIC-

1

R645 0R3-U

2 1

4 5 6 7

VCC IN+ INGND MAX4060EUA

C296 R646 1KR3

SCD1U16V3KX

S.D.

S.D.
1 2

S.B.

*Proto-3B use Coto as 2nd source.

C299 SC1U10V5KX 2

R647 1KR3

S.D.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

INT MIC
(Through LED conn.)

S.C.

Title

AUDIO ( 2 of 2 ) --Phone Jack
Size A3 Document Number

PEBBLE--02203
Sheet 25 of

Rev SD 40

Date: Thursday, March 13, 2003

+5V_QDOCK

+5V_QDOCK D13 2 1

D12 1 +5V_QDOCK1 2

+5VRUN 1 +5V_QDOCK

BC62 SCD1U16V3KX

RB751V-40-U R78 S.C. 1KR3

RB751V-40-U

S.C.
BC61 SCD1U16V3KX

16,18,20,23 P_TRDY# 16,18,20,23 P_AD11 16,18,20,23 P_DEVSEL# 16,18,20,23 P_AD12 16,18,20,23 P_STOP# 16,18,20,23 P_AD9 16,18,20,23 P_PERR# 16,18,20,23 P_SERR# 16,18,20,23 P_AD10 16,18,20,23 P_PAR 16,18,20,23 P_C/BE#0 16,18,20,23 P_AD7 16,23 PIRQB# 16,18,20,23 P_AD6 16,18,20,23 P_AD8 16,18,20,23 P_AD4 16,18,20,23 P_AD5 16,18,20,23 16,18,20,23 16,18,20,23 16,18,20,23 P_AD3 P_AD2 P_AD0 P_AD1

P_AD11 P_AD12 P_AD9

P_AD10 P_C/BE#0 P_AD7

P_AD6 P_AD8 P_AD4 P_AD5 P_AD3 P_AD2 P_AD0 P_AD1 P_AD24

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

U11 NC 1A1 1A2 1A3 1A4 1A5 1A6 GND 1A7 1A8 1A9 1A10 1A11 1A12 2A1 2A2 VCC 2A3 GND 2A4 2A5 2A6 2A7 2A8 2A9 2A10 2A11 2A12 TSCBT16211 1OE# 2OE# 1B1 1B2 1B3 1B4 1B5 GND 1B6 1B7 1B8 1B9 1B10 1B11 1B12 2B1 2B2 2B3 GND 2B4 2B5 2B6 2B7 2B8 2B9 2B10 2B11 2B12

2

D-DOCK Q'SW
U59 NC 1A1 1A2 1A3 1A4 1A5 1A6 GND 1A7 1A8 1A9 1A10 1A11 1A12 2A1 2A2 VCC 2A3 GND 2A4 2A5 2A6 2A7 2A8 2A9 2A10 2A11 2A12 TSCBT16211 1OE# 2OE# 1B1 1B2 1B3 1B4 1B5 GND 1B6 1B7 1B8 1B9 1B10 1B11 1B12 2B1 2B2 2B3 GND 2B4 2B5 2B6 2B7 2B8 2B9 2B10 2B11 2B12 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 QUIETE# PDK_AD30 PDK_AD31 PDK_AD28 PDK_AD29 PDK_AD27 PDK_AD26 PDK_AD25 PDK_AD24 PDK_C/BE3# PDK_AD22 PDK_AD23 PDK_AD21 PDK_AD19 PDK_AD17 PDK_AD20 PDK_C/BE2# PDK_AD18 PDK_AD16 PDK_AD14 PDK_C/BE1# PDK_FRAME# PDK_AD15 PDK_AD13 PDK_IRDY# PDK_AD30 PDK_AD31 PDK_AD28 PDK_AD29 PDK_AD27 27 27 27 27 27

56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29

QUIETE# PDK_TRDY# PDK_AD11 PDK_DEVSEL# PDK_AD12 PDK_STOP# PDK_AD9 PDK_PERR# PDK_SERR# PDK_AD10 PDK_PAR PDK_C/BE0# PDK_AD7 PDK_PIRQB# PDK_AD6 PDK_AD8 PDK_AD4 PDK_AD5 PDK_AD3 PDK_AD2 PDK_AD0 PDK_AD1 PDK_TRDY# 27 PDK_AD11 27 PDK_DEVSEL# 27 PDK_AD12 27 PDK_STOP# 27 PDK_AD9 27 PDK_PERR# 27 PDK_SERR# 27 PDK_AD10 27 PDK_PAR 27 PDK_C/BE0# 27 PDK_AD7 27 PDK_PIRQB# 27 PDK_AD6 27 PDK_AD8 27 PDK_AD4 27 PDK_AD5 27 PDK_AD3 27 PDK_AD2 27 PDK_AD0 27 PDK_AD1 27 PDK_IDSEL 27 16,18,20,23 16,18,20,23 16,18,20,23 16,18,20,23 16,18,20,23 16,18,20,23 P_AD30 P_AD31 P_AD28 P_AD29 P_AD27 P_AD26 P_AD30 P_AD31 P_AD28 P_AD29 P_AD27 P_AD26 P_AD25 P_AD24 P_C/BE#3 P_AD22 P_AD23 P_AD21 P_AD19 P_AD17 P_AD20 P_C/BE#2 P_AD18 P_AD16 P_AD14 P_C/BE#1 P_AD15 P_AD13

16,18,20,23 P_AD25 16,18,20,23 P_AD24 16,18,20,23 P_C/BE#3 16,18,20,23 P_AD22 16,18,20,23 P_AD23 16,18,20,23 P_AD21 16,18,20,23 P_AD19 16,18,20,23 P_AD17 16,18,20,23 P_AD20 16,18,20,23 P_C/BE#2 16,18,20,23 P_AD18 16,18,20,23 P_AD16 16,18,20,23 P_AD14 16,18,20,23 P_C/BE#1 16,18,20,23 P_FRAME# 16,18,20,23 P_AD15 16,18,20,23 P_AD13 16,18,20,23 P_IRDY#

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

PDK_AD26 27 PDK_AD25 27 PDK_AD24 27 PDK_C/BE3# 27 PDK_AD22 27 PDK_AD23 27 PDK_AD21 27 PDK_AD19 27 PDK_AD17 27 PDK_AD20 27 PDK_C/BE2# 27 PDK_AD18 27 PDK_AD16 27 PDK_AD14 27 PDK_C/BE1# 27 PDK_FRAME# 27 PDK_AD15 27 PDK_AD13 27 PDK_IRDY# 27

+5V_QDOCK +5VRUN BC63 SCD1U16V3KX U62 1 2 3 4 5 6 7 8 9 10 NC A0 A1 A2 A3 A4 A5 A6 A7 GND QS3245 VCC OE# B0 B1 B2 B3 B4 B5 B6 B7 20 19 18 17 16 15 14 13 12 11 2 QUIETE# PDK_NB_PME# PDK_PCIRST# PDK_LOCK# PDK_GNT#0 PDK_NB_PME# 27 PDK_PCIRST# 27 PDK_LOCK# 27 PDK_GNT#0 27 28 QBUFEN# 27 DOCK_PCI_EN# 1 +5VRUN R443 100KR3 BC403 SCD1U16V3KX 1 2 3 U63 A B GND VCC 5 4 QUIETE#

18,20,23,28 NB_PME# 7,10,16,18,20,23,29 PCIRST# 16 P_PLOCK# 16 P_GNT#0

From DOCK

OR

Y

NC7ST32P5-U

To open Q-Switch

Dock on sequence
* BIOS requests through SMB to connect to PCI bus in the dock * D-dock state machine generates REQ 0 * ICH4 generates GNT0 * Notbook waits for next Idle bus cycle (IORDY# and FRAME#) * DOCK_QWNS_PCI is generated * on rising edge of PCI clock REQ0 is deasserted and DOCK_PCI_EN# is asserted * now Q-switch is enabled and PCI goes through to the dock * D-dock reports connection through SMB * re-enumeration is done by BIOS

+3VRUN +3VRUN U58 A B GND VCC Y BC386 5 4 1 2 3 SCD1U16V3KX U57 A B GND VCC Y 5 4 +3VRUN 1 C142 SCD1U16V3KX 2 R409 100KR3

P_FRAME# P_IRDY#

1 2 3

S.C.
U56 P_GNT#0 1 2 3 NC A GND

NC7SZ08-1 +3VRUN VCC Y 5 4

DOCK_OWNS_PCI 27

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

S.C.
C143 SCD1U16V3KX

NC7SZ08-1

NC7SZ04P5

D Dock Buffer
Size Document Number Custom

PEBBLE--02203
Sheet 26 of

Rev SD 40

Date: Thursday, March 13, 2003

DOCK_PWR_SRC CN17A BC34 SCD1U50V5KX BC33 SC1000P50V3KX P1 P2 P3 P4 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S15 S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39 S40 S41 S42 S43 S45 S47 S48 V1+ V2+ V3+ V4+ S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S15 S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39 S40 S41 S42 S43 S45 S47 S48 S49 S50 S51 S52 S53 S54 S55 GND GND GND GND GND GND GND GND GND GND GND GND GND GND AMP-CONN272-8R-U1 2 V5+ V6+ V7+ V8+ S69 S70 S71 S72 S73 S74 S75 S76 S77 S78 S79 S80 S81 S82 S83 S84 S85 S86 S87 S88 S89 S90 S91 S92 S93 S94 S95 S96 S97 S98 S99 S100 S101 S102 S103 S104 S105 S106 S107 S108 S109 S110 S111 S112 S113 S114 S115 S116 S117 S118 S119 S120 S121 S122 S125 S126 S127 S128 P5 P6 P7 P8

DOCK_DC_IN

BC10 SCD1U50V5KX

BC9 SC1000P50V3KX

CN17B

S.B.
TP3 TPAD30 DAC_RED 8,11 D_SERIRQ 29 PDK_IDSEL 26 D_LDRQ1# 29 D_LFRAME# 29 DVI_SCLK 8 DVI_SDAT 8 DVI_DETECT 10 PDK_AD8 26 PDK_C/BE0# 26 PDK_AD14 26 PDK_AD15 26 PDK_DEVSEL# 26 PDK_IRDY# 26 PDK_AD19 PDK_AD20 PDK_AD27 PDK_AD28 PDK_AD30 PDK_AD19 26 PDK_AD20 26 PDK_AD27 26 PDK_AD28 26 PDK_AD30 26 PDK_GNT#0 26 D_USBP5N 22 D_USBP5P 22 8,11 DAC_GREEN 8,11 DAC_BLUE

10 DVI_CLK10 DVI_CLK+

DVI_TX4DVI_TX4+ DVI_TX3+ DVI_TX328,39 PS_ID

DVI_TX5+ DVI_TX510 DVI_TX2+ 10 DVI_TX210 DVI_TX1+ 10 DVI_TX1-

DVI

10 DVI_TX0+ 10 DVI_TX026 PDK_AD31 PDK_AD31

3 PCLK_DOCK 1

26 PDK_PIRQB# R384 33R3 28 DOCK_SMB_CLK 28 DOCK_SMB_DAT 29 CLK_SM1 29 DAT_SM1

No Stuff
2

BC367 SC22P

SMBUS

CLOSE TO DOCK CONN

SMBUS ADDRESS : DOCK/APR Microprocessor --74H DOCK USB/IDE Interface(FX2) --72H

S49 S50 S51 S52 S53 S54 S55 G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14

S69 M_SEN# S70 S71 S72 S73 S74 S75 S76 S77 S78 S79 S80 S81 S82 S83 S84 S85 S86 S87 S88 S89 S90 S91 S92 S93 S94 S95 S96 S97 S98 S99 S100 S101 S102 S103 S104 S105 S106 S107 S108 S109 S110 S111 S112 S113 S114 S115 S116 S117 S118 S119 D_TRCT S120 S121 S122 D_TRCT S125 S126 S127 S128

LPC

29 D_LAD1 29 D_LAD2 29 D_LAD3 26 PDK_AD1 26 PDK_AD0 26 PDK_AD3 26 PDK_AD4 26 PDK_AD7 26 PDK_AD9 26 PDK_AD10 26 PDK_AD11 26 PDK_PAR 26 PDK_SERR# 26 PDK_LOCK# 26 PDK_FRAME# 26 PDK_C/BE2# 26 PDK_AD16 26 PDK_AD22 26 PDK_AD23 26 PDK_AD24 26 PDK_AD29 26 PDK_NB_PME# PDK_AD1 PDK_AD0 PDK_AD3 PDK_AD4 PDK_AD7 PDK_AD9 PDK_AD10 PDK_AD11

PDK_AD8

PDK_AD14 PDK_AD15

PDK_AD16 PDK_AD22 PDK_AD23 PDK_AD24 PDK_AD29

SPDIF USB

10 TV_C/R 26 DOCK_PCI_EN# 24 SPDIF_OUT 18 10M_LED# 18 100M_LED# 26 DOCK_OWNS_PCI

DOCK_SMB_INT# 28 CLK_KBD 29 DAT_KBD 29 +2.5VAUX_LAN 1

R49 0R3-U 2 BC43 BC44 SCD01U50V3KX SCD01U50V3KX 18 18 18 18 D_TRCT

BC42 BC41

SCD01U50V3KX SCD01U50V3KX

DOCK_DET# S137 S138 S139 S140 S141 S142 S143 S144 S145 S146 S147 S148 S149 S150 S151 S152 S153 S154 S155 S156 S157 S158 S159 S160 S161 S162 S163 S164 S165 S166 S167 S168 S169 S170 S171 S172 S173 S174 S175 S176 S177 S178 S179 S180 S181 S182 S183 S184 S185 S186 S187 S188 D_TRCT S189 S190 D_TRCT S193 S194 S195 S196

S137 S138 S139 S140 S141 S142 S143 S144 S145 S146 S147 S148 S149 S150 S151 S152 S153 S154 S155 S156 S157 S158 S159 S160 S161 S162 S163 S164 S165 S166 S167 S168 S169 S170 S171 S172 S173 S174 S175 S176 S177 S178 S179 S180 S181 S182 S183 S184 S185 S186 S187 S188 S189 S190 S193 S194 S195 S196 M204 AMP-CONN272-8R-U1

S205 S206 S207 S208 S209 S210 S211 S212 S213 S214 S215 S216 S217 S218 S220 S222 S223 S224 S225 S226 S227 S228 S229 S230 S231 S232 S233 S234 S235 S236 S237 S238 S239 S240 S241 S242 S243 S244 S245 S246 S247 S248 S250 S252 S253 S254 S255 S256 S257 S258 S259

S205 S206 S207 S208 S209 S210 S211 S212 S213 S214 S215 S216 S217 S218 S220 S222 S223 S224 S225 S226 S227 S228 S229 S230 S231 S232 S233 S234 S235 S236 S237 S238 S239 S240 S241 S242 S243 S244 S245 S246 S247 S248 S250 S252 S253 S254 S255 S256 S257 S258 S259

DOCK_DET# DAT_DDC1_5 11 CLK_DDC1_5 11 JVGA_HS 11 JVGA_VS 11 D_CLKRUN# 29 D_LAD0 29 DOCK_SIO_ALERT# 28 PDK_AD2 PDK_AD5 PDK_AD6 PDK_AD2 26 PDK_AD5 26 PDK_AD6 26

PDK_AD12 PDK_AD13

PDK_AD12 26 PDK_AD13 26 PDK_C/BE1# 26 PDK_PERR# 26 PDK_STOP# 26 PDK_TRDY# 26

PDK_AD17 PDK_AD18 PDK_AD21 PDK_AD25 PDK_AD26

PDK_AD17 26 PDK_AD18 26 PDK_AD21 26 PDK_C/BE3# 26 PDK_AD25 26 PDK_AD26 26 P_REQ#0 16 PDK_PCIRST# 26 TV_COMP 10 TV_Y/G 10 1G_LED# 18 LAN_ACT_LED# 18 HDD_LED 32

LAN

D_TR3N D_TR3P D_TR2N D_TR2P

LAN MODEM

18 18 18 18

D_TR1N D_TR1P D_TR0N D_TR0P DK_TIP

NC NC

MH1 MH2 SPDIF_OUT

M204

1 R23 DUMMY-R3 1 2 C11 DUMMY-C3 2 +5VALW +3VALW 1 1 R5 10KR3 R21 10KR3 2

M136

M136

DK_RING

MODEM

1 CN18 MOLEXCON2-1 1 2 4 3

R31 0R3-U

LAYOUT NOTES: Terminators should be as close as possible to dock connector pins. Keep traces as short as possible.

+DC_IN GP4 1 2 GAP-CLOSE-PWR GP2 1 2 GAP-CLOSE-PWR GP3 1 2 GAP-CLOSE-PWR GP1 1 2 GAP-CLOSE-PWR +DC_IN 8 7 6 5 U2 D D D D SI4435DY S S S G 1 2 3 4

DOCK_DC_IN

3

2 L3

1 4

NS

DK_TIP DK_RING

S.C.

ACM2520U6012P-U 1 R30 0R3-U 2

Co-layout with U32

Co-Layout with L3 For Modem Cable from MDC
PWR_SRC 1 2 3 4 U8 S S S G SI4435DY 1 D D D D 8 7 6 5 BC36 SCD1U50V5KX DOCK_PWR_SRC

DOCK_DC_IN

DOCKED 18,28 3 OUT

1

1

1

2

+3VSUS

BC336 SC1000P50V3KX

1

R45 100KR3 2 2

R350 100KR3

2

BC363 BC364 BC35 SC4D7U25V-U SC4D7U25V-U SCD1U50V5KX S.C. S.C. 2

2

R44 38K3R3

BC337 SCD1U50V5KX

1 R362 100KR3 DOCK_DET#

2

Q2 2 IN R1

1 GND R2 DTC144EUA

U50 DOCKED 28 DOCK_PWR_EN 1 2 3 A B GND VCC Y 5 4

3

C127 SCD1U16V3KX 1 G

NS

D S

2

S.B.

Q3 2N7002

NC7SZ08-1 S.C.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

D Dock Connector
Size Document Number Custom

PEBBLE--02203
Sheet 27 of

Rev SD 40

Date: Thursday, March 13, 2003

+3VALW

+3.3VRTC

BC198 SCD1U16V3KX

BC197 SCD1U16V3KX

BC286 SCD1U16V3KX

BC252 SCD1U16V3KX

+3VRUN

BC287 SCD1U16V3KX +3VRUN_SIO_PLL 2

+3VRUN L22 *S.C. 1

D3 E1 H2 K6 P4

VCCO/BAT VCC2/PLL

VCC1 VCC1 VCC1 VCC1 VCC1 VCC1 VCC1

VCC2 VCC2 VCC2 VCC2 VCC2

A4 R5

U38A

M7 R13 L11 H10 B16 F10 A6

BC196 SCD1U16V3KX

BC195 SCD1U16V3KX

BC192 SCD1U16V3KX

BC193 SCD1U16V3KX

BC290 SCD1U16V3KX

BC256 SCD1U16V3KX

BC254 SCD1U16V3KX

BC253 SCD1U16V3KX

MLB201209-1 BC200 SCD1U16V3KX

X7 4 1 CLK_32KX1 CLK_32KX2 A3 C5 K14 M4 XTAL1 XTAL2 IRRX IRTX

3

2 BC288 SC5P

31 IRRX 31 IRTX

BC289 SC5P XTAL-32.768K4P 82.30001.031

27 DOCK_SMB_CLK 27 DOCK_SMB_DAT 6,22,30 CLK_SMB 6,22,30 DAT_SMB

D9 E9 A9 C9

AB1B_CLK AB1B_DATA AB1A_CLK AB1A_DATA

OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 LGPIO50 LGPIO51 LGPIO52 LGPIO53 LGPIO54 LGPIO55 LGPIO56 LGPIO57 LGPIO60 LGPIO61 LGPIO62 LGPIO63 LGPIO64 LGPIO65 LGPIO66 LGPIO67

C7 F7 B6 E6 C6 A5 B5 D7 B7 E7 A7 G7 T5 N6 L6 R6 T6 L7 P7 N7 A15 D13 A14 C12 B13 A13 D12 F11

CHG_PBATT

EEPROM_WC 30 DOCK_PWR_EN 27 HW_RADIO_DISABLE# 23,31 LAN_LOW_PWR 18 CHG_PBATT 39 TI_SUSPEND# 20 AUDIO_ON 24 LIVE_ON_BATT 34 QBUFEN# 26 TP133 TPAD30 BREATH_LED 32 FAN1_PWM 6 PWRSW_SIO# 34 PM_SLP_S3# 16 NB_PME# 18,20,23,26 ATF_INT# 6 PM_SLP_S5# 16 SPDIF_SHDN 24 LID_CL# 25 DOCK_SIO_ALERT# 27

S.B.

+5VALW 1

+3VALW 1

R345 4K7R3 2 2

31 COM_DCD0# 16,31 COM_RI0# 31 COM_DTR0# 31 COM_CTS0# 31 COM_RTS0# 31 COM_DSR0# R346 31 COM_TXD0 4K7R3 31 COM_RXD0 18,27 DOCKED

H5 B10 H6 H8 H7 G1 G2 G5 B9 B8 A8 C8 D8 SBAT_ALARM# E8 SBAT_PRES# F8 G8 H13 H12 H11 G10 G16 G12 G15 G13 J14 J16 H15 H16 H14 J15 J13 G9 F9 G14 F16 F15 F12

DCD# RI# DTR# CTS# RTS# DSR# TXD RXD IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO19 GPIO20 GPIO21

Macallen LPC47N254
LGPIO[57..50] can be programmed to pass-through to LGPIO[67..60].

+3VALW RN12

PWRSW_SIO# NB_PME#

2 1

3 4

+3VALW

22 DH_MOD_PRES# R602 27 DOCK_SMB_INT# 1 2 ACAV_IN_SIO S.B. 10KR3 R347 +3VALW 1 4K7R3 R348 1 2 1 3 4 SRN4D7KJ RN52 2 3 1 4 SRN8K2J 2 1 RN20 SRN8K2J 3 4 +3VALW 2 10KR3 1 R328 4K7R3 2 PS_ID R329 1 RN53 4K7R3 DAT_SMB CLK_SMB DOCK_SMB_CLK DOCK_SMB_DAT 2 2

Low Active 11 FPVCC
39 ACAV_IN_SIO

SATA_DET#

* S.D. PWRBTN# 24,31,33,34,35,38 RUN_ON 24,31,33,34,35,38 ICH_PME# 16 THRM# 16 SUS_ON 33,34,35,38 SYS_SUSPEND 37 * S.C. TP147 TPAD30 DH_PWRSRC_OC 22

ATF_INT# DOCK_SIO_ALERT#

2 1

SRN10KJ RN13

3 4

SRN10KJ +3VALW DH_PWRSRC_OC 1 R559 4K7R3 2

39 PBAT_PRES#

+3VALW

*SD

S.B.

+3VALW

34 THERMTRIP_SIO 4 PROCHOT# 19,20,21 SCR_DETECT 39 CHG_130W#/90W 31 KSO14 31 KSO15 39 PBAT_ALARM# 31 KSO16 32 CAP_LED# 32 NUM_LED# 31 IRMODE 11,39 PBAT_SMBDAT 11,39 PBAT_SMBCLK 6 FAN1_TACH 32 SCR_LED# 16 GATEA20 TP120 27,39 PS_ID

S.C.

LGPIO70 LGPIO71 LGPIO72 LGPIO73 LGPIO74 LGPIO75 LGPIO76 LGPIO77 SGPIO30 SGPIO31 SGPIO32 SGPIO33 SGPIO34 SGPIO35 SGPIO36 SGPIO37 SGPIO40 SGPIO41 SGPIO42 SGPIO43 SGPIO44 SGPIO45 SGPIO46 SGPIO47 STROBE# ERROR# PE INIT# SLCTIN# ACK# ALF# BUSY SLCT

B12 A12 C11 D11 E11 B11 A11 C10 F13 F14 E16 E15 E12 E13 D16 D15 E14 C16 C15 A16 D14 C14 C13 B14

IDE_RST_MOD FPBACK_EN RBAT_DET# COINCELL_DET# MODC_EN#

IDE_RST_HDD# 19 TP124 TPAD30 TP123 TPAD30 DH_POWER_EN 22 TP122 TPAD30 TP131 TPAD30 TP129 TPAD30 HDDC_EN# 19,33 CBUS_GRST# 20 HP_NB_SENSE 24,25 CHG_65W 39 D23 AUX_EN 33,35 2 USB_EN 22

PBAT_ALARM#

HP_NB_SENSE KSO_17D MODPRES# USB/IDE#

SBAT_SMBDAT SBAT_SMBCLK

1 +3VALW 1

KSO_17 32

RB751V-40-U S.C.

SMBus Pull-ups
+3VALW

FAN2_TACH CHG_SBATT

Don't need PU on GPIO List???
+3VALW PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 2 1 RN19 3 4

DEBUG_ENABLE DEBUG_OUT

EXT_SMI# 16 EXT_SCI# 16 EXT_WAK# 16 RCIN# 16 NB_MUTE 25 SIO_BEEP 25

R327 10KR3 2 CN8 1 2 3 CON3-4 20.D0012.103

CHG_SBATT

S.C.

*SE
D72 PS_ID

+3VALW

3 DA204U-U1 C361 SC10P 2

G4 G6 B1 F1 F2 C1 G3 D4 B2

F4 F3 E2 F5 E4 D1 D2 E3

SRN10KJ

1

LPC47N254-U

NS

LPT may remove for Power-ON Reset Logic
+3VRUN MODPRES# 1 R296 10KR3 USB/IDE# 1 R295 100KR3 2 2 Title

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Macallen ( 1 of 2 )
Size Document Number Custom

PEBBLE--02203
Sheet 28 of

Rev SE 40

Date: Thursday, March 13, 2003

+5VRUN RN54 DAT_SM1 CLK_SM1 2 DAT_KBD CLK_KBD

TP116 TPAD30

R274

TP127 TPAD30

2 1

3 4

2 1

SRN4D7KJ RN51 3 4 SRN4D7KJ

1

BAT2_LED# 32 BAT1_LED# 32 XOSEL MODE 2 2 R331 R332 1 10KR3 1 10KR3

10KR3

K12 L10

B4

E5

U38B TP128 TPAD30 TP130 TPAD30 DAT_KBD CLK_KBD DAT_SM2 CLK_SM2 DAT_SM1 CLK_SM1 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 E10 D10 J6 J4 A1 B3 C3 C4 P10 N10 R10 M10 K10 K9 L9 M9 N9 P9 T9 R9 R8 T8 P8 N8 M8 L8 J8 K8 T7 R7 N2 P1 P2 N3 T3 R4 T2 R2 TPAD30 TP113 16,18,20,23 P_CLKRUN# 16,20 SERIRQ 16 LPC_LAD3 16 LPC_LAD2 16 LPC_LAD1 16 LPC_LAD0 +3VRUN 16 LPC_LDRQ0# 16 LPC_LDRQ1# R306 1 16 LPC_LFRAME# 7,10,16,18,20,23,26 PCIRST# 1 EC_SCI# K16 P5 T4 J3 P3 T1 R1 M3 M6 R3 H4 N4 H3 MSDATA MSCLK KDAT KCLK IMDAT IMCLK EMDAT EMCLK KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 DLAD0 DLAD1 DLAD2 DLAD3 DCLKRUN# DSER_IRQ DLFRAME# DLDRQ1# EC_SCI# CLKRUN# SER_IRQ PCI_CLK LAD3 LAD2 LAD1 LAD0 LDRQ0# LDRQ1# LPCPD# LFRAME# LRESET#

J12 J10 J9

PS/2 I/F Pull-ups

VCC1_PWROK 30 +3VALW PWRGD VCC1_PWRGD RESET_OUT# CLOCKI 24MHZ_OUT 32KHZ_OUT FCS# FWR# FRD# FA0 FA1 FA2 FA3 FA4 FA5 FA6 FA7 FA8 FA9 FA10 FA11 FA12 FA13 FA14 FA15 FA16 FA17 FA18 FA22 FA21 FA20 FA19 FD0 FD1 FD2 FD3 FD4 FD5 FD6 FD7 FDC_PP# DRVDEN0 DRVDEN1 MTR0# DS0# DIR# STEP# WDATA# WGATE# HDSEL# INDEX# TRK0# WRTPRT# RDATA# DSKCHG# FPD K13 K15 H1 J1 J2 D5 P15 N14 P14 N12 T13 P12 T14 T15 R16 N13 P16 M14 N15 N16 M13 L12 M15 M16 L14 L13 L15 L16 P13 T16 R14 K11 T11 R11 M11 N11 P11 T12 R12 M12 A10 J7 K7 K1 K5 K2 K4 K3 L1 L2 L5 L4 L3 M1 M2 M5 RUNPWROK 33,34,36,38 CLK14_SIO NC_24MHZ NC_32KHZ RESET_OUT# 34 TP117 TPAD30 TP134 TPAD30 FCS# 30 FWR# 30 FRD# 30 2 CLK14_SIO 3 U37 2 1 RESET# GND VCC 3 C98 SCD1U16V3KX

FDD_LED# PWR_LED# BAT_LED#

XOSEL

To D-DOCK PS/2(KB) To Touchpad CONN To D-DOCK PS/2(Mouse)

27 27 31 31 27 27

TEST_PIN FPGM

MODE

1

MAX6326UR29-T-U R297 10R3

S.C.

KSO_17 and KSI0 for i buttom KSO_17 and KSI6 for Audio_Mute# buttom KSO_17 and KSI4 for Volum Up buttom KSO_17 and KSI5 for Volum down buttom
31 KSO[0..13] 31,32 KSI[0..7]

KSO[14..16] on GPIO4,5,7 KSO_17 on SGPIO34
+3VRUN

Macallen LPC47N254

SIO_FA0 SIO_FA1 SIO_FA2 SIO_FA3 SIO_FA4 SIO_FA5 SIO_FA6 SIO_FA7 SIO_FA8 SIO_FA9 SIO_FA10 SIO_FA11 SIO_FA12 SIO_FA13 SIO_FA14 SIO_FA15 SIO_FA16 SIO_FA17 SIO_FA18

BC257 SC10P

Macallen standard part need it, also uesd to reset BIOS. but special part can remove it.

SIO_FD[0..7]

30

SIO_FA[0..19] 30

RN17 SRN100KJ 27 27 27 27 D_LAD0 D_LAD1 D_LAD2 D_LAD3

SIO_FA19 SIO_FD0 SIO_FD1 SIO_FD2 SIO_FD3 SIO_FD4 SIO_FD5 SIO_FD6 SIO_FD7 FDC_PP#

TP115 TPAD30 TP112 TPAD30 TP114 TPAD30

1

3 4

R278 100KR3

2

2 1

27 D_CLKRUN# 27 D_SERIRQ 27 D_LFRAME# 27 D_LDRQ1#

+3VALW 1 R330 1KR3 2

+3VRUN

3 PCLK_SIO R305 22R3 2

PCLK_SIO

2 4K7R3

AGND VSS/PLL

BC255 SC10P

FDD_INDEX# FDD_TRK0# FDD_WRTPRT# FDD_RDATA# FDD_DSKCHG#

RN14 RN16 RN15

2 1 2 1 2 1

3 SRN1KJ 4 3 SRN1KJ 4 3 SRN1KJ 4

*S.C.

C2 F6 J5 N1 N5 T10 R15 J11 G11 B15 H9 D6 L25

A2 P6

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS LPC47N254-U

2

*S.C.
1

MLB201209-1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

Macallen ( 2 of 2 )
Size A3 Document Number

PEBBLE--02203
Sheet 29 of

Rev SD 40

Date: Thursday, March 13, 2003

8Mbit(1M Byte),No PLCC type
U36 29 SIO_FA[0..19] SIO_FA0 SIO_FA1 SIO_FA2 SIO_FA3 SIO_FA4 SIO_FA5 SIO_FA6 SIO_FA7 SIO_FA8 SIO_FA9 SIO_FA10 SIO_FA11 SIO_FA12 SIO_FA13 SIO_FA14 SIO_FA15 SIO_FA16 SIO_FA17 SIO_FA18 SIO_FA19 21 20 19 18 17 16 15 14 8 7 36 6 5 4 3 2 1 40 13 37 22 24 9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 E# G# W# M29W008B-90 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 RP# RB# NC NC NC VCC VCC 25 26 27 28 32 33 34 35 10 12 29 38 11 31 30 BC156 SC1U10V5KX VSS VSS 23 39 BC158 SCD1U16V3KX SIO_FD0 SIO_FD1 SIO_FD2 SIO_FD3 SIO_FD4 SIO_FD5 SIO_FD6 SIO_FD7 RESET#/NC RY/BY#/NC SIO_FD[0..7] 29

1

R324 0R3-U

2

VCC1_PWROK 29

TP118 +3VALW

29 FCS# 29 FRD# 29 FWR#

ST: M29W008AB-90 "72.29008.C09" MXIC: 29LV008BTC-90 "72.29008.B09"

SMBus address A2
User Password

+3VALW

+3VALW BC285 1 2 3 4 U39 E0 E1 E2 VSS VCC WC# SCL SDA 8 7 6 5 SCD1U16V3KX EEPROM_WC 28 CLK_SMB 6,22,28 DAT_SMB 6,22,28

S.B.

M24C04 Title

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

BIOS
Size A4 Document Number

PEBBLE--02203
Sheet 30 of

Rev SD 40

Date: Thursday, March 13, 2003

KB CONN
To Touchpad conn
29 KSO5 29 KSO3 29 KSO1 29 KSO2 29 KSO0 29 KSO8 29 KSO7 29 KSO6 28 KSO16 28 KSO15 28 KSO14 29 KSO13 29 KSO9 29 KSO10 29 KSO11 TP_GND TP_X TP_Y TP_V+

41 MH1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 MH2 42

CN11 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 P/S_L_BUT KSI0 KSI1 KSI2 KSI3 29 29 29 29

FIR
BC211 SC1000P50V3KX +3VRUN U15 VCC NC TXD RXD SCLK/SD VCC NC GND IR-IRMS6452-U 1 2 3 4 5 6 7 8 1 +3VRUN P/S_R_BUT

Bluetooth Module conn.

KSI6 29,32 KSI7 29 KSI4 29,32 KSI5 29,32 KSO12 29 KSO4 29

BC212 SC4D7U10V-U

IRTX 28 IRRX 28 IRMODE 28

2

BC411 SCD1U16V3KX

BC412 SC10U10V-U1

S.C.

+3VSUS

* S.C.
1 L52 15 USBP1P 15 USBP1N R648 1 R649 1

*S.C.
2 0R3-U 2 0R3-U

Pin 39

S.B.
2 C106 SCD1U16V3KX

Pin 1

COIL-22UH-1 23 COEX1_BT_ACTIVE 23,28 HW_RADIO_DISABLE# 23 COEX2_WLAN_ACTIVE 32 BT_ACTIVITY C342 SC4D7U10V-U

S.B. S.B.
1 +3V_BT

Pin 40

*SD

HRS-CONN40D-3-U 20.F0361.040

TOP VIEW Pin 2

R621 10KR3 2

1 2 3 4 5 6 7 8 9 10 11 12

CN13

S.B.

MOLEX-CON10-U 20.D0012.110

Note:Place R621 near CN13.

*SD:for EMI
KSO6 KSO8 KSO7 KSO0 1 2 3 4 RC3 8 7 6 5 KSI6 KSI1 KSI2 KSI3 1 2 3 4 RC2 8 7 6 5

TOUCHPAD CONN
+5VRUN 1 21 R301 4K7R3 2 R300 1 47R3 BC224 SC10P 2 BC223 SC10P T/P_R_BUT 17 15 13 11 T/P_R_BUT P/S_R_BUT 9 7 5 3 TP_GND BC225 SC1000P50V3KX 1 19 16 14 12 10 8 6 4 2 20 MLX-CONN18A 20.K0062.018 T/P_L_BUT P/S_L_BUT TP_V+ TP_Y TP_X BC273 SC10P +5VRUN_TP 1 R316 Pin 8:LEFT(P/S) +5VRUN Pin 6:XYVCC Pin 2:XIN Pin 4:YIN 2 1 R320 4K7R3 2 2 47R3 Pin 10:Left(T/P) 22 18 T/P_L_BUT Pin 18:Left(T/P BUTTON) Contact CN12 Pin 12:CLK Pin 14:VDD

SRC100P50V-U RC6

SRC100P50V-U RC4

29 DAT_SM2

0R3-U BC272 SCD1U16V3KX R319 1

SRC100P50V-U KSO4 KSO14 KSO15 KSO16 1 2 3 4 RC5 8 7 6 5 KSO5 KSO3 KSO1 KSO2 1 2 3 4

SRC100P50V-U RC1 8 7 6 5

Pin 1:SYSGND

Pin 7:RIGHT(P/S)

Pin 3:NC

Pin 5:NC

Pin 11:GND

Pin 13:DAT

BC274 SC10P

SRC100P50V-U

SRC100P50V-U

BC275 SC1000P50V3KX

S.B.

SERIAL PORT
MAX3243_C1+ C116 SCD33U16V +5VSUS 1 C119 SCD047U25V3KX MAX3243_C1MAX3243_C2+ MAX3243_C228 COM_TXD0 28 COM_RTS0# 28 COM_DTR0# 28 COM_DSR0# 28 COM_CTS0# 28 COM_RXD0 28 COM_DCD0# 28 24 1 2 14 13 12 20 19 18 17 16 15 23 22 21 U45 C1+ C1C2+ C2T1IN T2IN T3IN R2OUTB R1OUT R2OUT R3OUT R4OUT R5OUT FORCEON FORCEOFF# INVALID# ICL-3243ECA VCC V+ VT1OUT T2OUT T3OUT R1IN R2IN R3IN R4IN R5IN GND 26 27 3 9 10 11 4 5 6 7 8 25

+5VSUS 11 C12 SCD1U16V3KX C118 SCD33U16V C115 MAX3243_V+ MAX3243_VCOMTXD0 COMRTS0# COMDTR0# COMDSR0# COMRI0# COMCTS0# COMRXD0 COMDCD0# SCD33U16V COMRI0# COMDTR0# COMCTS0# COMTXD0 COMRTS0# COMRXD0 COMDSR0# COMDCD0# 5 9 4 8 3 7 2 6 1 10 C4 SC270P50V3JN C8 SC270P50V3JN

CN2

R26 10KR3 2

FOX-CON9-1-U

16,28 COM_RI0# +5VSUS 1 100KR3 R25 2

S.B.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

FORCEON

24,28,33,34,35,38 RUN_ON

C3 SC270P50V3JN

C7 SC270P50V3JN

Intersil

C2 SC270P50V3JN C1 SC270P50V3JN

C6 SC270P50V3JN C5 SC270P50V3JN

T/P,KB Connector & IrDA
Size A3 Document Number

Pin 9:Right(T/P)

Pin 15:GND

CLK_SM2 29

Pin 17:Right(T/P BUTTON)

Pin16:GND

KSO11 KSO10 KSO9 KSO13

1 2 3 4

8 7 6 5

KSI7 KSI4 KSI5 KSO12

1 2 3 4

8 7 6 5

PEBBLE--02203
Sheet 31 of

Rev SD 40

Date: Thursday, March 13, 2003

BLUETOOTH LED HDD LED
Q7 19 IDEACT# 2 R2 R1 DTA114YKA 1 3 2 470R3 HDD_LED 27 31 BT_ACTIVITY R43 1 ACT_LED 2 IN +5VRUN

Q8 47K R1 R2 DTC144EUA

3 OUT 1 GND

BT_LED#

POWER LED

BATTERY LED
+5VALW R2 Contact R2 Q10 R1 DTA114YKA Q11 R1 29 BAT2_LED# IN 2 DTA114YKA Q9 47K 2 R1 IN R2 DTC144EUA 3 OUT PWR_LED# 1 GND 29 BAT1_LED# IN 2 1 3

R100 BAT1LED 1 470R3 2 BAT1_LED

28 BREATH_LED

1 OUT 3 GND BAT2LED 1

LED & BUTTON BD CONN
28 NUM_LED# 28 SCR_LED# NUM_LED# SCR_LED# 1 BC32 SCD1U10V2MX-1 R75 R76 1 2 2 150R3 1 1 150R3

2

S.B.

2

S.B.

BC60 SCD1U10V2MX-1 1 +3VRUN

R99 2 150R3 1 CAP_LED# 28 BC77 SCD1U10V2MX-1

2

1

S.B.

2

BC74 SCD1U10V2MX-1

S.B.

S.B.
G2 1 3 CN7 G1 2 4 6 8 10 12 14 16

2

R74

1 1 2

34 POWER_SW# 1 2

1

R98 470R3

KSI6 29,31 BC30 SC470P50V2KX

2

470R3

S.B.
2

BC76 SC470P50V2KX R97 1

S.B.

+5VSUS

5 7 9 11

2

R73

1 1 2

KSI5 29,31

29,31 KSI4 1 2

S.B.
1

470R3 BC75 SC470P50V2KX +5VRUN 2 470R3 BAT1_LED

470R3

BC29 SC470P50V2KX

13 15 17 19

S.B.

BAT2_LED

R96

28 KSO_17 1 2

S.B.

BC73 SC470P50V2KX

1

18 20 1 22 24 G3
20.K0062.024

1

S.C.
BC59 SC2200P50V2KX 25 INT_MIC+

2

21 23 G4

ACT_LED

BC72 SC2200P50V2KX

S.B.

2

S.B.
R72 25 INT_MIC1

2

BC58 SC2200P50V2KX

MLX-CONN24A

S.B.

BT_LED# 1

2

2

470R3 S.C. BC57 SC2200P50V2KX

S.C.
1 R95 2

PWR_LED# 1

2

470R3 S.C. BC71 SC2200P50V2KX

Title

S.C.

Size A3

Pin 24:AUDIO_GND Pin 23:INT_MIC Pin 22:GND Pin 21:PWR_LED# Pin 20:ACT_LED Pin 19:BAT1_LED Pin 18:BAT2_LED Pin 17:BT_LED# Pin 16:GND Pin 15:+5VRUN Pin 14:GND Pin 13:KSO_17 Pin 12:KSI_5 Pin 11:KSI_4 Pin 10:KSI_6 Pin 9:POWER_SW Pin 8:GND Pin 7:+5VSUS Pin 6:GND Pin 5:SCR_LED# Pin 4:CAP_LED# Pin 3:NUM_LED# Pin 2:GND Pin 1:+3VRUN

Date: Thursday, March 13, 2003

GND OUT

+5VALW

R77 2 BAT2_LED 470R3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

LED Button FPC Connector
Document Number

PEBBLE--02203
Sheet 32 of

Rev SD 40

DC_12V

DC_12V 100KR3 1

100KR3

+5VSUS Q55 6 5 2 1 D S

1

+5VRUN

R549

2

R315

2

3

3

3 2

24,28,31,34,35,38 RUN_ON

1 G 2

D S

2

2

3

2

S

1 G 2 Q59 47K R1 3 OUT

D S

3 Q57 1 2N7002 G 2

2 D S Q56 2N7002

Q36 2N7002

2N7002

3G

1 G 2

D S

1

Q75

4 C157 SC4D7U10V-U D

+5VALW R548 1KR3 Q74 2N7002 1 G 1

VCC_CORE 1

VCC_IO 1

SI3456DV-U

R433 100KR3

R430 20R3F

R401 20R3F

29,34,36,38 RUNPWROK +3VSRC +3VAUX_LAN Q18 Q63 6 5 2 1 100KR3 1 4 S +3VSUS D 6 5 2 1 4 S D +3VRUN

2 IN

1 GND R2 DTC144EUA

DISCHARGE VCC_CORE & VCCT
1 3 2 C36 SC4D7U10V-U D R341 56R3

3G

PWR_SRC 100KR3

SI3456DV-U

S.B.
Q38 2N7002 1 G 2 1 R540 1KR3 3 2 Q73 2N7002 1 G 2 1 R299 1KR3 3 2 Q35 2N7002 1 G 2 1 R314 1KR3 3 2 Q37 2N7002 1 G 2

3G

SI3456DV-U PWR_SRC 6 5 2 1 100KR3 1

1

Q17 4 D S

3 2

R475

S C47 SC4D7U10V-U

R476

2

3G

Q65 2N7002 2 1

SCD01U50V3KX

1MR3

3 2

R94

28,35 AUX_EN

R431

2

R474

R289

S

C35

R91

1 G 2

D S

2

2

Q16 2N7002

2

1MR3

1 G

1

D

100KR3

1MR3

1 G

D S

Q64 2N7002 1 1

SI3456DV-U

+1.8VRUN

3

2

D S

28,34,35,38 SUS_ON

R290

2 IN

1 GND R2 DTC144EUA

R1

3 OUT

1MR3

LAN switch

Q29

1

+1.5VSUS Q69 6 5 2 1

+1.5VRUN 4 S C209 SC4D7U10V-U D

2

1

SUS switch
1 G

3 2

D S

Q66 2N7002 BC460 SCD1U16V3KX +2.5VSUS

3G

R480 47R5

D

SI3456DV-U

S

2

+1.25VRUN

HDD power

+12V

+5VSUS

+5VHDD

1 R288 47R5 3 2

RUN switches
D DC_12V Q60 TP0610T 2 1 +12V S

Q77 R562 100KR3 2 6 5 2 1 1 1 4 S BC504 SC4D7U10V-U 2 1 G D

D S

3G

SI3456DV-U

28 HDDC_EN#

2 IN

Q76 47K R1

2

1

1 GND R2 DTC144EUA

R437 100KR3 Q58 RUNPWROK 2 IN R1

3

3 OUT

BC503 SCD1U50V5KX

SUS bleeders

2

R563 100KR3

Q28 2N7002

RUN bleeders

1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

3 OUT 2

1 GND R2 DTC144EUA

S.C.

C158 SC4D7U25V-U

Power Plane Enables
Size A3 Document Number

PEBBLE--02203
Sheet 33 of

Rev SD 40

Date: Thursday, March 13, 2003

+5VSUS +5VRUN 1

+5VSUS

14

UX1B 4 +5V_RUNPWROK#

14

R472 100KR3 2

BC115 SCD1U16V3KX UX1C 6 TSAHC14 1 2 7 +3VSUS +3VSUS BC385

+3VRUN

3 BC91 SCD22U10V3KX

5

14

14

3

S.C.

RUNPWROK 29,33,36,38

2

R438

1 BC399

3

U54B TSLCX14-U 4

14 1

7

7

TSAHC14

SCD1U16V3KX U20A TSLCX08-U U54A TSLCX14-U 2

VCORE_PWRGD_D 16

7

From SC1486
37 1.25V_PWRGD 24,28,31,33,35,38 RUN_ON 4 5

U20B TSLCX08-U 6

14

SCD1U16V3KX

S.C.

From Macallen

7

7

100KR3

S.C.

S.C.

TO ICH4

+3VALW +3VRUN +3VRUN U55A TSLCX08-U C141 SCD1U16V3KX

+3VRUN

+3VALW

C235 SCD1U16V3KX U74A TSLCX08-U 3 14 1 U74B TSLCX08-U

14

From SC1486
37 2.5V_PWRGD 14 2

4,6 ITP_DBRESET# 36 VCORE_PWRGD SUSPWROK 16

1 2 7

S.C.
3

C160 SCD1U16V3KX

S.C.

R440 100KR3 1 2 C159 SCD1U16V3KX

5

U54C TSLCX14-U 6

14 9

From ITP Debug Board

14

U54D TSLCX14-U 8

DELAY_IMVP_PWRGD 7,16

14

From SC1476

28,33,35,38 SUS_ON 35 1632_3VOK

5 7

6

7

4

S.C.

TO ICH4 RSMRST#
38 1715PWROK

U55B TSLCX08-U

S.C.
7 7

S.C.

TO ICH4

4 5 7

S.C.
6

+3VRUN U55C TSLCX08-U

14

From MAX1631

From MAX1715

9 29 RESET_OUT# 10 7

S.C.
8

CK408_IMVP_PWRGD 3,7

From Macallen

TO CLOCK GEN.

Therm Trip Circuit
1

+3VSUS

+RTC_PWR THERMTRIP_SIO 28 1

R367 150KR3 2

90 deg C 95 deg C
U47 3 2 1 HYST GND GND

ADZS ABZT

BC353 SCD1U16V3KX 2 +3VSUS +3VSUS 1

R629 10KR3

C287 SCD1U16V3KX

Q94 2 IN R1

3 OUT

INTRUDER# 16

VCC TOVER#

4 1 5

1 GND R2 DTC144EUA

2 R630 8K2R3 Q96 2N7002 D S 1 3 D S 1 G Q97 2N7002 2 2 1 R633 100KR3 R631 10KR3 U83 1 2 6 7 CK D CLR# PR# NC7SZ74K8X +RTC_PWR +RTC_PWR BC420 SCD1U16V3KX R634 20KR3F 14 UX2A 2 SSVHCT14 28 LIVE_ON_BATT +RTC_PWR U65A TSAHCT32-1 3 7 1 +RTC_PWR Q61 D 2 G S 3 FDN338P-U +5VALW +3.3VRTC Q62 D 2 G S 3 FDN338P-U +3VALW Q Q# VCC GND 5 3 8 4 TP144 2 IN Q95 R1 3 OUT THERM_STP# 35

MAX6501UKP095 2

R632 22KR3 2

Place near CPU
+5VSUS

*SD=>95 deg C
HW_FAILSAFE# 1 G

1 GND R2 DTC144EUA

14

UX1A 2 TSAHC14 2 1

+5V_RUNPWROK#

1

7

2

3

1

S.C.
1 C288

D70 RB751V-40-U 2

S.C.

1

S.C.

1

1

R429 100KR3 D45

2

S.C.

SCD1U16V3KX

2 RB751V-40-U

BC421 SCD1U16V3KX

C185 SC1U10V5KX S.B.

BC439 SCD1U16V3KX

C156 SC4D7U10V-U

+RTC_PWR 1 +RTC_PWR R473 10KR3 +RTC_PWR 14 UX2B 4 SSVHCT14 BC90 SCD1U16V3KX 4 5 7 U65B TSAHCT32-1 6 1 2 14

14

S.C.

From Power Button
2 32 POWER_SW# BC440 SCD1U16V3KX 2

3

7

7

28 PWRSW_SIO#

1

D50

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

To Macallen

RB751V-40-U

S.C.

39 ACAV_IN

Power-ON Reset Logic
Size Document Number Custom

Adaptor IN

PEBBLE--02203
Sheet 34 of

Rev SD 40

Date: Thursday, March 13, 2003

34 THERM_STP#

From Thremal Trip CKT

+RTC_PWR U65C TSAHCT32-1 R427 8 1 1KR3 7 2 1 C155 DUMMY-C3 D15 B0530W 3V_BST 1 1 5V_BST

28,33,34,38 SUS_ON 28,33 AUX_EN

9 10

14

D44 B0530W

S.D.
2 2

S.D.
PWR_SRC

SUS_ON 1

1 2KR3F R132 240KR3 2

2 1 C34 DUMMY-C3

C43 SCD1U50V5KX

R135 10R3 1632_V+ C180 SCD1U50V5KX C181 SC1U25V-U 2

1

R133

2

+5V_BIAS

*SD
PWR_SRC 1 1 C349 SC10U25VMX-2-U C350 SC10U25VMX-2-U

C186 SCD1U50V5KX 1 C347 SC10U25VMX-2-U

*SD

2

1

2

S.C.

C183 SC4D7U25V-U

1 TP16 TPAD30 2 TC24 ST15U25VDM 1 2

C348 SC10U25VMX-2-U

2

2

1

*S.C.
C344 SC2200P50V2KX U61 U53 7 4 3 2 1 FDS6982S 25 3V_DH 3V_DL 3V_LX 3V_CSH 3V_FB 27 24 26 1 2 3 23 9 TIME/ON5 BST3 DH3 DL3 LX3 CSH3 CSL3 FB3 SHDN# REF SKIP# RESET# PGND GND 12OUT/STEER VDD/SECFB 22 6 21 28 18 16 19 17 14 13 12 15 5V_DH 5V_DL 5V_LX 5V_CSH 5V_FB 8.2uH DCR=33m ohm 4.3A 35uH DCR=580m ohm 12.5*12.5 4 3 2 1 FDS6982S

1

1

1

1

2

2

2

S.B.

2

BC362 BC361 SC2200P50V2KX SCD1U50V5KX

TC22 ST15U25VDM

TC16 ST15U25VDM

2

S.B.

V+ SYNC VL

RUN/ON3 BST5 DH5 DL5 LX5 CSH5 CSL5 FB5 SEQ

U48 5 6 7 8 1 R71 2

TP67 TPAD30 +3VSRC 1 1 BC381 SCD1U16V3KX DUMMY-R3 R428 R70 2

D012R3720

D012R3720 1

1 D42 MBRM140T3 BC56 SCD1U16V3KX 2 1 R93 0R3-U TP17 2 1 2 TC4 ST150U6D3VM-U R92 DUMMY-R3 2 1

DCR=10m ohm 5.6A 12.5 * 12.5 L5 1 2 ETQP6F8R2

5 6 7 8

2

BC383 SC2200P50V2KX

BC382 SCD1U50V5KX

1

2

TC18 ST15U25VDM

+5VSUS

1

D41 MBRM140T3 2

BC55 SC1U10V5KX

TP14 TPAD30 2

TP15 TPAD30 1 3 L6 STQ124-8222-U1 2 4

10 11 20 8 4 5

MAX1632AEAI-U

2

TC23 ST150U6D3V-1-U

C140 SC1U10V5KX R426 0R3-U

1

1

2

2

TC17 ST150U6D3V-1-U

2

D11 TP13 TPAD30 +5VSUS 1 R399 2 DUMMY-R3 DC_12V 24,28,31,33,34,38 RUN_ON R398 0R3-U 1 TC55 SE4D7U25VEM-1-U C139 SC4D7U25V 1 MBRS1100T3

S.B

TPAD30

BC398 SC1U10V5KX

2

1

2 1

Proto-1B

NS Proto-1B

2

S.C.

C33 SC4D7U25V-U

1632_3VOK 34

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

DC/DC 3V/5V/12V
Size A3 Document Number

2

TC26 ST150U6D3V-1-U

1

PEBBLE--02203
Sheet 35 of

Rev SD 40

Date: Thursday, March 13, 2003

+3VRUN 1

1 2 1476_CMPRF R458 22K6R3F VCC_CORE +5VRUN

PWR_SRC 1 1 SC10U25VMX-2-U C351 1 C71 SCD1U50V5KX C72 SCD1U50V5KX 2 5 6 7 8 5 6 7 8 1 SC10U25VMX-2-U C353 2 1

*SD
C354 SC10U25VMX-2-U 2 1 C355 SC10U25VMX-2-U

1

S.B. C233

2

2

2

3

1

1

1

2N7002 1 G 3 D S 1 G Q21 2 D Q22

D S

2

2

2

2

2

1

2

3,16 PM_STPCPU#

Q20 1 G 2N7002

3

2

1

S 2N7002 +3VRUN 1

CORE

D18 B0530W

4 3 2 1

4 3 2 1

VCC_CORE DCR=1.1m ohm Output C ESR < 3m R119 2 L-D36UH 1 2 1 1 Connect to system GND 1 TC31 SE220U2VDM D002R7520F L14 1

S.D.

2

BC85 SC330P50V3KX SC1476_AGND

BC466 BST1_VCORE SC1U10V5KX R510 1R3F

2

R122 332R3F

BC435 SC1U10V5KX

IRF7811A S S S G S S S G

IRF7811A

TC41 ST15U25VDM

TC38 ST15U25VDM

TC42 ST15U25VDM

TC43 ST15U25VDM

1 TC39 ST15U25VDM TC30 SE220U2VDM

U72

U71

2

R179 100KR3

SC2200P50V2KX

C352 SC10U25VMX-2-U 2

D D D D

D D D D

1

2

1

D 4 TG1 DRN1 BG1 PGND1 ISH1 CL1 CMP1 CLRF CMPRF CMP2 CL2 ISH2 DAC 2 1 37 36 34 33 32 31 29 28 27 26 24 18 19 21 22 1476_DH1 1476_LX1 1476_DL1 1476_ISH1 1476_CL1 1476_CMP1 1476_CLRF 1476_CMPRF 1476_CMP2 1476_CL2 1476_ISH2 1476_DAC 1476_DH2 1476_LX2 1476_DL2 1 2 R150 619R3F S.B. 1 R486 1 R485 1 R484 1 R483 1 R457 1 R456 1 R455 1 R454 2 10KR3F 2 825R3F 2 499R3F 2 845R3F 2 432R3F 2 499R3F 2 825R3F 2 10KR3F G S 1 2 3

U29 PH5330 4

D G S 1 2 3

U30 PH5330

23 38

BST1

16 DPRSLPVR 29,33,34,38 RUNPWROK +3VRUN 2 R180 100KR3F 34 VCORE_PWRGD 4 H_VID[5:0]

SC1476_AGND

4 35 16 H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0 1476_CLSET 1476_HYS 9 10 11 12 13 14 7 8

DPRSL EN PWRGD VID5 VID4 VID3 VID2 VID1 VID0 CLSET HYS

2

SC1476_AGND

VCCA

CORE V5_1

BC102 SC1U10V5KX

U67 1476_VCCA 30

3

D48 B540C

1

R123 10R3

2

5

5

D21 MBRM140T3 2

SB

R452 1R3

1

*SD *SD *SD

R152 100KR3 2 VCORE_PWRGD 1 1 1

C172 SC180P25V3JN

1

1

2

1

1476_VH_L

2

1476_VH_R1

R453 1R3 2

SB

C225 SCD1U16V3KX S.B. 2

R181 61K9R3F 2

R151 30K1R3F 2

R183 16K5R3F Proto-1B 1476_PBOOT 6 1476_VDRP 5 15 PBOOT VDPR SS GND V5_2 BST2

1476_VH_R2 PWR_SRC

SC1476_AGND

SC1476_AGND

2

BC464 SC1000P50V3KX

BC465 SC1000P50V3KX 2

R182 24K9R3F

C224 SCD01U16V2KX S.B.

25 20 17

Proto-1B
1

15KR3F

SC1476ITSTR SC1476_AGND

2

5 6 7 8

5 6 7 8

S.B.C223 SC2200P50V2KX

C232 SCD1U50V5KX

SC1476_AGND

BC101 SC1000P50V3KX

C231 SCD1U50V5KX 2 1

Vboot=1.2V Vdpr=0.749V R184

TG2 DRN2 BG2 PGND2

1

Proto-1B
1

R149 1R3F BC463

U69 IRF7811A

U70 IRF7811A

4 3 2 1

SC1476_AGND

1

4 3 2 1

SC1476_AGND

BST2_VCORE D49 SC1U10V5KX

Note: all Grounds Tied together at output Caps. GP7 1 2 AGND 20mil GAP-CLOSE-PWR SC1476_AGND

B0530W BC434 SC1U10V5KX

DCR= 1.1m ohm L13 1 L-D36UH 5 5 D 4 G S U28 PH5330 1 2 3 4 G S U27 PH5330 1 2 3 2 D 2 1 D47 B540C 1 2 1 R118 2 D002R7520F 1 TC32 SE220U2VDM 1 TC35 SE220U2VDM

S.D.

+5VRUN

VID
VID5 VID4 VID3 VID2 VID1 VID0

Vcore V 1 0 0 1 1 1 0 0 1 0 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 1 1.340 0 1.324 0 1.292 0 1.260 1 1.244 1 1.212 1 1.180 1 1.148 0 1.100 1 1.052 1 1.020 0 0.972 0 0.940
1476_CL1 C62 SC330P50V3KX CORE CORE 1476_CL2 C60 SC330P50V3KX

2

0 0 0 0 0 0 1 1 1 1 1 1 1

1 1 1 1 1 1 0 0 0 0 0 0 1

0 1 1 1 1 1 0 0 0 1 1 1 0

D20 MBRM140T3 2

1476_CMP1

C40 SC330P50V3KX

C41 SC180P S.B.

C61 SC180P S.B.

SC1476_AGND

C177 SC330P50V3KX

1476_CMP2

1476_CLRF

1476_ISH1 C63 SCD1U16V3KX

1476_ISH2 C39 SCD1U16V3KX

1476_CMPRF

SB

If MBRM140T3 is ok will remove B540C

10 mil Trace list for layout PIN4 PIN5 PIN7 PIN25 PIN30

20 mil Trace list for layout The +5VRUN(PIN38 and PIN20) BST1_VCORE BST2_VCORE

100 mil Trace list for layout 1476_DH1 1476_LX1 1476_DL1 1476_DH2 1476_LX2 1476_DL2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

CPU_CORE--IMVP4
Size A3 Document Number

2

2

TC12 SE220U2VDM

D D D D S S S G

D D D D S S S G

PEBBLE--02203
Sheet 36 of

Rev SD 40

Date: Thursday, March 13, 2003

A
+5VSUS

2.5V/1.25V DDR
2 R556 10R3 5VCCA1 1 5VCCA2 1 2 R555 10R3 C241 SC1U10V5KX C250 SC1U10V5KX

C236 C249 SC1U10V5KX C240 SC1U10V5KX SC1U10V5KX

+5VRUN +3VSUS

D55 MBRM140T3

D26 MBRM140T3 2

1 1 1 PWR_SRC R321 470KR3 2 2.5V_PWRGD 34 1.25V_PWRGD 34 2 U43 4 3 2 1 5 6 7 8 FDS6982S

SC1486_AGND1 1 C357 SC10U25VMX-2-U

SC1486_AGND2

2

C253 SC1U10V5KX

*SD
2 1 2

C356 SC10U25VMX-2-U

1

PWR_SRC

*SD
TC49 ST15U25VDM 1 R557 2 1MR3F 4 SCD1U50V5KX C237 3 2 1 FDS6982S S.B. 1 R322 2 4 26 1 8 10 24

22 25 11 3 17

2

S.B.

2

C110 SC2200P50V2KX

C109 SCD1U50V5KX

EN/PSV1 VCCA1 VCCA2 VDDP1 VDDP2

PGOOD1 PGOOD2 TON2 BST2 DH2 LX2 DL2

TON1 2.5V_BST 2.5V_DH 2.5V_LX 2.5V_DL

23 7 6 5 2

TON1 BST1 DH1 LX1 DL1

9 21 20 19 16

TON2 1.25V_BST 1.25V_DH 1.25V_LX 1.25V_DL

1

R553

S.B.

+2.5VSUS

12.5*12.5 L=10.4uH@0A L=8.2uH@6A
L23 1 1 2 L-10D4UH-1 S.B.

U40 5 6 7 8

750KR3F C252 SCD1U50V5KX

DCR=15m 3.5A 6.7*6.7
L26 1 L-3D3UH-1 2 C111 SCD1U16V3KX

+1.25VRUN

1

1

1 2 TC50 ST150U6D3V-1-U

2

2

TC44 ST150U6D3V-1-U

TC47 ST150U6D3V-1-U

C100 SCD1U16V3KX

C108 SC47P 2

R343 40K2R3F

ILIM1 FBK1 PGND1 AGND1 AGND2 REFIN REFOUT VOUT1

ILIM2 FBK2 PGND2

18 12 15

1

R323 4K7R3F

2

10KR3F 2.5V_FBK

S.B.
1
GP10 1 2

1
1 R317 10KR3F 2

1

R342 10KR3F

2 SC1486_AGND1

28

1

DDR_VREF R318 10KR3F C103 SCD1U16V3KX R554 10R3 1 SC1486_AGND2 SC1486_AGND2 2 C239 SC1U10V5KX SC1486_AGND1 SC1486_AGND2

14

SC1486ITSTR

TON1

TON2 C251 SC1000P50V3KX C238 SC1000P50V3KX

GAP-CLOSE-PWR SC1486_AGND1 GP9 1 2

SC1486_AGND1

SC1486_AGND2

2

GAP-CLOSE-PWR SC1486_AGND2

+12V 1

+DC_IN 1

+RTCSRC 1 R84 10KR3 U9 5 4 SHDN# 5/3# IN GND OUT 1 2 3 +RTC_PWR 2

RTC POWER
2 PBAT_12V C285 SCD1U50V5KX S.B. 3 C28 SC1000P50V3KX CN5 MLXCON2 BC45 SC4D7U10V-U 4 1 2 RBAT 2 1

S.C.
R58 1

D9 RB751V-40-U 2 PBAT_DC 6K2R3 2

BRIDGE BATTERY Charge &Discharge path D8
RB751V-40-U

S.C.

+RTCSRC

PWR_SRC D40 1 2

R57 4K7R3 D7 2 1 1 R386 100KR3 2 1

MBRM140T3

MAXIM1615EUK

MBRM140T3

3

U13 5 4 SHDN# 5/3# IN GND OUT 1 2 3

+3.3VRTC

Q49 NDS352AP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

MAXIM1615EUK

Q48 BC67 SC4D7U10V-U 28 SYS_SUSPEND 2 IN R1

3 OUT

2

1 GND R2 DTC144EUA

DDR 2.5V & 1.25V
Size A3 Document Number

2

27 13

1

1

2

U76

C105 C104 SCD1U50V5KX SC2200P50V2KX

1

R344 470KR3

2

1

TC48 ST15U25VDM

D G

PEBBLE--02203
Sheet 37 of

Rev SD 40

Date: Thursday, March 13, 2003

A

1.5VSUS
1 C93 SCD1U16V3KX 2 R259 10R3 1

+5VSUS

2

S.C.

2

C91 SC10U10V-U1

C92 SC2200P50V2KX U32 S.B. 4 2 IN_1 IN_2 VCC FBSEL SHDN# COMP TOFF LX_1 LX_2 LX_3 FB PGND_1 PGND_2 GND REF SS 16 14 3 8 15 13 9 10 5

Gang Song GSRH5D28_6R2 6.2uH,33mOHM,1.8A 5.7*5.7*3
L40 M1644_1.5V 1 2 IND-6D2UH-2

1.8VRUN
+1.5VSUS +3VSUS +1.8VRUN

1

1

1

1

2

2

2

S.B.

1

C82 SC2D2U10V5KX

2

24,28,31,33,34,35 RUN_ON

2

1

R257 49K9R3F 2

500mA MAX1792EUA50 74.01792.A30

2

ANALOG GND

1

12 C94 SC470P50V2KX 11 S.B. 1 6 7

S.B.

R256 18K7R3F-1

1

S.C.

2

M1644_VCC

2

TC40 ST220U4VDM-1

C66 SC10U10V-U1

C67 SCD1U16V3KX 1 2 3 4

1

U24 IN IN RST# SHDN# OUT OUT SET GND GND 8 7 6 5 9

R140 22K1R3F

1 C50 SC10U10V-U1

S.C.

C51 SCD1U16V3KX

M1644_FB

>1.6V:High <0.8V:Low

R141 49K9R3F

MAX1792EUA50-U1

Vout = Vset * ( 1+Rup/Rdown) Vset = 1.25V Rup=22.1K, Rdown=49.9K, Vtyp=1.803V

28,33,34,35 SUS_ON

1

R202 10KR3

2 1 1 R258 270KR3 2 C81 DUMMY-C3

MAX1644

C234 SCD047U25V3KX

C95 SC1U10V5KX

Rdown=49.9K Rup=Rdown(Vout/Vref-1) Vref=1.1V Vout=1.512V

2

Vcc_IO/1.2VRUN
1 +5VSUS C358 SC10U25VMX-2-U 1 2 2

*SD
PWR_SRC

PWR_SRC

2

U106,U108 input CAP
1 1 C345 C69 SC2200P50V2KX SCD1U50V5KX C59 SCD1U50V5KX TC34 ST15U25VDM PWR_SRC

2

C219 SC4D7U10V-U C70 SCD1U16V3KX C88 SC4D7U10V-U U17 5 6 7 8 FDS6982S 4 3 2 1

C87 SC1U10V5KX 2

R222 10R3F

D52 B0530W

D19 B0530W

1 C222 SC2200P50V2KX

S.D.
1 1 U68 20 1715_VCC 21 1715_ILIM1 3 1715_ILIM2 12 1 2 25 R506 2D2R3 26 1.05_DH 1.05_LX 1.05_DL R509 0R3-U 2 5 1 R177 1 1KR3F C220 SCD1U16V3KX 2 1 9 2 8 C230 SCD47U16V TON OUT1 REF FB1 N.C. N.C. N.C. AGND 27 24 VDD VCC ILIM1 ILIM2 BST1 DH1 LX1 DL1

S.D.
4 10 11 18 17 16 19 22 14 6 13 1 7 1 R530 2KR3F 2 C228 2 2D2R3 SCD1U50V5KX

S.B.

C221 SCD1U50V5KX PWR_SRC

2

*S.C.

2

V+ ON1 ON2 BST2 DH2 LX2 DL2 PGND OUT2 SKIP# FB2 PGOOD

VCC_IO

L10 1 C38 SCD1U16V3KX TC29 ST150U6D3V-1-U TC28 ST150U6D3VM-U 1

DCR=20m 3.5A 6.7*6.7
2

SCD1U50V5KX C218

RUNPWROK 29,33,34,36 U25 4 3 5 6 7 8 FDS6982S 2

1 R527 1.2_DH 1.2_LX 1.2_DL

DCR=27m 2.5A 6.7*6.7
L12 1 L6D2UH 2 1 TC33 ST150U6D3VM-U C58 SCD1U16V3KX

+1.2VRUN

+5VSUS 1

1 D16 B0530W

L-3D3UH-1

2 1

1

D14 B0530W

1

S.D.
2

S.D.

2

2

S.B.

+3VRUN R529 10KR3F C229 SCD1U16V3KX

S.B.

2

2

1

R178 20KR3F

MAX1715EEI-U2 S.C.

15 23 28

R508 100KR3 2 1715_ILIM1 1 1715_ILIM2 1

2

1715PWROK 34 R507 100KR3 2 2 R528 100KR3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title

S.B.

S.B.

Vcc_IO,1.2V,1.5V,1.8V
Size A3 Document Number

PEBBLE--02203
Sheet 38 of

Rev SD 40

ILIM

SETTING

Date: Thursday, March 13, 2003

CHG_DC_IN

A
D60 2 1 PWR_SRC +RTC_PWR 1 2 3 4 1 R567 2 MBRM140T3 U78 G S S S D D D D 8 7 6 5 1

S.B

GP12 2 GP13 2 GP14 2 GP15 2

1 GAP-OPEN 1 GAP-OPEN 1 GAP-OPEN 1 1 GAP-OPEN 2 D61 B0530W

ACAV_IN

S.D.

D015R3720F 1 1 1 R569 4D7R3 2 2 R570 4D7R3 R597 1MR3 2 2 1 R598 1MR3

C261 SC1U25V-U

R571 1KR3 PDS High Voltage=PWR_SRC 1645_PDS 2

1645_PDS

3

2 Q84 TP0610T 1

1645_AGND

FDS6675-U

BATT+

S.C.
C323 SCD1U50V5KX C333 SCD1U50V5KX

From EMI request

ACAV_IN 34 1 3 C263 SCD01U50V3KX D Q85 2N7002 S 3 D Q86 2N7002 S D67

2

2

C262 SCD01U50V3KX

R599 1MR3 2 C264 SC1U25V-U

1 G

1 G

2

1

ACAV_IN_SIO 28

1645_VCC R572 33R3 1 2

PWR_SRC C332 SCD1U50V5KX C334 SCD1U50V5KX C335 SCD1U50V5KX C336 SCD1U50V5KX C337 SCD1U50V5KX C338 SCD1U50V5KX C339 SCD1U50V5KX C340 SCD1U50V5KX C341 SCD1U50V5KX

C265 SC1U25V-U

1

1

1

1

1645_VCC_R C269 SC1U10V5KX 1645_AGND 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15

2

2

2

2

C268 SC1U10V5KX 1645_AGND U79 1645_DCIN 1645_CLS 1645_REF 1645_CCS 1645_CCI 1645_CCV 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DCIN LDO CLS REF CCS CCI CCV GND BATT DAC VDD THM SCL SDA MAX1645BEEI

2

S.B.

D62 B0530W

S.D.
L42 L20UH-U C270 SCD1U16V3KX 1 2 1 2 3 4 FDS6982S U81 8 7 1 6 5 BATT+

*SD

D63 2 1 MBRM140T3 U80 G S S S D D D D 8 7 6 5 1 2 3 4

C271 SCD01U50V3KX 1

C272 SCD01U50V3KX 1

C273 SCD01U50V3KX

Imax=Vcls/(20*0.015) CONSTANT POWER SET: 65W:3.06A 90W:4.093A 130W:5.851A

R574 100KR3F 2

1645_DAC PBAT_SMBCLK PBAT_SMBDAT C274 SCD1U50V5KX

CVS PDS CSSP CSSN BST DHI LX DLOV DLO PGND CSIP CSIN PDL INT#

CSSP CSSN 1645_BST 1645_DH 1645_LX 1645_DL CSIP CSIN

1

1645_LX_L 1

R573

2

1

1

1

1

TC53 SE33U25VM-U1

TC54 SE33U25VM-U1

1

D04R3720F-1 R575 1R3F 2 2

S.C. S.C.
R576 1R3F 2 2 R611 2KR6J

FDS6675-U

2

D64 MBRM140T3

Proto-3B

R577 10KR3 2

R578 10KR3 2

R579 10KR3

1

1

2

2

C266 C267 SC2200P50V2KX SCD01U50V3KX

TC51 ST15U25VDM

TC52 C359 C360 ST15U25VDM SC10U25VMX-2-U SC10U25VMX-2-U

1

1

1

1

2

3

2

2

2

2

28 CHG_65W

GPIO
1645_AGND

65W 1 0

90W 0 1

130W 0 0
9 MH2 5 MH1 7

1

Vmax=1645_Vmax * 4.5
VMAX set: 4cell--1.745V(PBID-4.9K to GND) 6cell--1.307V(PBID-NC)

+5VALW 1

2 6 SKT-JACK-23 22.10088.451

L33 1 2 SCHOKE-D

BC335 SCD1U50V5KX

1

1645_REF=4.096V

2

R585 33R3 2

2

1

BC292 SCD1U50V5KX

BC291 SCD1U50V5KX

2

1

1

1

1

+5VALW

1645_VMAX R587 158KR3F

1 2 3

U82 IN+ VSS INVDD OUT

5 4 1

D65 2 1645_DAC

CN14 9 1 2 3 4 5 6 7 8 10 FOX-CON8-U1 PBAT+ PSMC PSMD PBP PSP PBID PGND

R339 3KR3 2 2 2 100R6J 2 100R6J 2 100R6J 2 100R6J 2 100R3 PBID

R338 100KR3 2

R333 8K2R3 2

1

1

1

R588 100KR3 2 PBID 1 G

2

3

2

2

C322 SCD1U50V5KX

C324 SCD1U50V5KX D S

C325 SCD1U50V5KX

C326 SCD1U50V5KX

C327 SCD1U50V5KX

C328 SCD1U50V5KX

C329 SCD1U50V5KX

C330 SCD1U50V5KX

C331 SCD1U50V5KX

S1N4148-U

*SD

PWR_SRC

R580 100KR3F

R581 75KR3F

R622 47KR3F

Address:12H
+5VALW

S.C.
GP11

1645_PDL

1
D S Q89 2N7002

*SE
1

Q79 4 5 6 SI1906DL 3 2 1

1645_AGND 1645_AGND C275 R583 PBAT_PRES#1 SC1U10V5KX 10KR3

2

GAP-CLOSE-PWR 2 1645_THM C278 1645_AGND SC1U25V-U

C276 SCD1U16V3KX

C277 SCD1U16V3KX

28 CHG_PBATT

1 G

ESD protection Need close to Battery conn
D68 PBAT_ALARM# 3 1 BAV99LT1 D24 2 PBAT_SMBDAT 3 1 BAV99LT1 D58 2 PBAT_SMBCLK 3 1 BAV99LT1 D25 2 PBAT_PRES# 3 1 BAV99LT1 2

+5VALW

CHG_130W#/90W 28

1645_AGND

Adapter
SKT1 8 3 4 1 L28 AJ_DC+ AJ_DC1

+DC_IN U44 S S S G P-MOS FET D D D D

CHG_DC_IN

1645_AGND

SGPIO32:CHG_65W GPI3:CHG_130W#/90W

R357 100KR3

BC345 SCD1U50V5KX

1 2 3 4

8 7 6 5

2 SCHOKE-D

SI4435DY

R356 100KR3

1645_REF

L29 1 2 PS_ID 27,28 MLB-1608080600A *S.C. Serial stream

to Macallen

BATT+ R586 56KR3F C279 SCD1U16V3KX

Bttery

+5VALW

R336 8K2R3

MAX4490AXK-T

R589 1MR3F Q80 2N7002 C281 SCD1U16V3KX

MBR0530T1 C280 SC1000P50V3KX R590 1 10KR3 2

R334 1 R335 1 R337 1 R617 1 R340 1

PBAT_SMBCLK 11,28 PBAT_SMBDAT 11,28 PBAT_PRES# 28 PBAT_ALARM# 28 BC293 SC47P Title

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

BC295 SC1000P50V3KX

BC490 SC1000P50V3KX

BC294 SC47P

MAXIM Charger
Size A3 Document Number

No stuff

PEBBLE--02203
Sheet 39 of

Rev SE 40

*S.C.=>NS

Date: Thursday, March 13, 2003

A

Impedance measurement coupon
Trace length >= 4 inches Trace width / Spacing = 5 / 5 mil-----45 ohm
+3VALW U74D TSLCX08-U 14 +3VALW U74C TSLCX08-U 14 +3VRUN U55D TSLCX08-U 14

+12V

L1
R510 R511

12 13 7

S.C.
11

9 10 7

S.C.
8

12 13 7

S.C.
11

U73B LM358M 7

5 6

R512

R513

Trace width / Spacing = 4 / 5 mil----55 ohm

L3
R514 R515
+3VSUS U20D TSLCX08-U 11 +3VSUS U20C TSLCX08-U 8 +RTC_PWR U65D TSAHCT32-1 11 14 14 14

L4
R516 R517

L7
R518 R519

12 13 7

S.C.

9 10 7

S.C.

12 13 7

L8
R520 R521

USB Diff. pair Twidth/Tspacing = 4/5 mil-----90 ohm
R522 R523
+5VSUS +5VSUS +5VSUS

L8

+5VRUN UX1F 12 TSAHC14 7 U1D TSAHCT125-1 11

+5VRUN U1C TSAHCT125-1 8

14

14

14

13

14

R524

R525

7

7

7

Diff. pair for LVDS, LAN Twidth/Tspacing = 4/8 mil-----100 ohm
R526 R527

9

8 TSAHC14

11

10 TSAHC14

13

12

9

L3

R528

R529

+RTC_PWR 14 UX2D 8 SSVHCT14

+RTC_PWR 14 UX2E 10 SSVHCT14

+RTC_PWR 14 UX2F 12 SSVHCT14

+3VRUN 14 U54F TSLCX14-U 12

+3VRUN 14 U54E TSLCX14-U 10

L8

R530

R531

9

11

13

13

11

S.C.
7 7

7

7

7

R532

R533

1394 Diff. pair Twidth/Tspacing = 4/10 mil----110 ohm
R534 R535
H1 HOLE H2 HOLE H5 HOLE H6 HOLE H7 HOLE

7

L8

EMI SPRING
G1 GNDPAD G2 GNDPAD

34.42P26.001
G3 GNDPAD G4 GNDPAD G5 GNDPAD G6 GNDPAD 34.42Y03.001

R536

R537

10

UX1D

UX1E

14

S.C.

4

L10

8 + 1 1 1 1 1 G8 GNDPAD G9 GNDPAD G10 GNDPAD G11 GNDPAD 1 1 1 1 1 G13 GNDPAD G14 GNDPAD G15 GNDPAD G16 GNDPAD G17 GNDPAD 1 1 1 1 1 1 Title

Host CLK signal Trace Twidth/Tspacing = 4/8 mil----100ohm
1 1 1 1

S.C
1

L4

R538

R539
H8 HOLE H9 HOLE H10 HOLE H11 HOLE H12 HOLE H13 HOLE H14 HOLE

G12 GNDPAD 34.42Y03.001

R540

R541
1 1 1 1 1 1 1

S.B

DDR CLK signal Trace Twidth/Tspacing = 7/4 mil----70ohm
R542 R543

L8

H15 HOLE

H16 HOLE

H17 HOLE

H18 HOLE

H19 HOLE

For MDC Boss
H20 HOLE H21 HOLE

34.42Y01.001

G18 GNDPAD 34.42Y24.001

S.C

R544

R545
1 1 1 1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

1

For HDD Boss

1

34.42Y02.001

S.C.

Holes & GND PADS
Size A3 Document Number

For CCC Boss

34.42Y02.001

1

S.C.

PEBBLE--02203
Sheet 40 of

Rev SD 40

Date: Thursday, March 13, 2003


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